Wafer-level contactor

• US 6,768,331 B2
• Filed: 04/16/2002
• Issued: 07/27/2004
• Est. Priority Date: 04/16/2002
• Status: Expired due to Term

• Current Assignee: Teradyne Incorporated
• Original Assignee: Teradyne Incorporated
• Inventors: Slocum, Alex, Longson, Simon
• Primary Examiner(s): Pert, Evan
• Assistant Examiner(s): HOLLINGTON, JERMELE M
• Application Number:
  US10/125,449
• Publication Number:
  US 20030193342A1
• Time in Patent Office: 833 Days
• Field of Search: 324/754, 324/758, 324/760, 324/761, 324/765
• US Class Current: 324/756.02
• CPC Class Codes: G01R 1/07314 the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support on an elastic support, e.g. a film, G01R1/0735
• CPC Class Codes: G01R 31/2863 Contacting devices, e.g. sockets, burn-in boards or mounting fixtures in general G01R1/04

Abstract

A contact housing adapted for carrying a plurality of compliant contacts is described. The contact housing is for use in contacting a semiconductor wafer-level package having an array of contacts disposed in a predetermined pattern. The contact housing includes a first guide plate formed from a material having a temperature coefficient of expansion approximating that of the semiconductor wafer-level package. The guide plate has a first pattern of apertures formed by a microelectromechanical process such that the pattern of apertures matches the predetermined pattern of contacts on the wafer-level package. A second guide plate is formed similar to the first guide plate, and includes a second pattern of apertures disposed in vertical registration with the first pattern of apertures. A spacer is interposed between the first and second guide plates. The first and second guide plates cooperate with the spacer to form respective receptacles adapted for carrying the plurality of compliant contacts.

Claims

1. A contact housing adapted for receiving a plurality of compliant contacts, the contact housing for use to engage a wafer-under-test, the wafer-under-test having a wafer coefficient of thermal expansion and including an array of conductive contact pads disposed in a wafer-level-packaged pattern, the contact housing including:

a first plate formed with a first pattern of apertures, the first pattern of apertures corresponding to at least a portion of the wafer-level-packaged pattern, the first plate consisting only of a material having a coefficient of thermal expansion matching the wafer coefficient of thermal expansion; and

a second plate formed with a second pattern of apertures, the second pattern of apertures disposed in a spaced-apart relationship for registering vertically with the first pattern of apertures, the first and second plates cooperating to define a plurality of contact receptacles for nesting the compliant contacts.

2. A contact housing according to claim 1 wherein:

the first plate consists only of a semiconductor material.

3. A contact housing according to claim 2 wherein:

the apertures are formed by a monolithic process.

4. A contact housing according to claim 3 wherein:

the monolithic process comprises a microelectromechanicalmachining process.

5. A contact housing according to claim 1 wherein:

the second plate is formed similar to the first plate.

6. A contact housing according to claim 5 and further including:

a spacer disposed between the first and second plates.

7. A contact housing adapted for receiving a plurality of compliant contacts, the contact housing for use to engage a wafer-under-test, the wafer-under-test having a wafer coefficient of thermal expansion and including an array of conductive contact pads disposed in a wafer-level-packaged pattern, the contact housing including:

a first guide plate consisting only of a material having a temperature coefficient of expansion approximating that of the semiconductor wafer-level package, the first guide plate having a first pattern of apertures formed by a monolithic process, the pattern of apertures matching the predetermined pattern of contacts on the wafer-level package;

a second guide plate formed similar to the first guide plate, and having a second pattern of apertures disposed in vertical registration with the first pattern of apertures; and

a spacer interposed between the first and second guide plates, the first and second guide plates cooperating with the spacer to form respective receptacles adapted for carrying the plurality of compliant contacts.

8. A contact housing according to claim 7 wherein:

the first plate consists only of a semiconductor material.

9. A contact housing according to claim 7 wherein:

the monolithic process comprises a microelectromechanicalmachining process.

10. A contact housing according to claim 7 wherein:

the spacer is formed of a plate of semiconductor material.

11. A contact housing adapted for receiving a plurality of compliant contacts, the contacts having contact bodies and contact tips, the contact housing for use to engage a wafer-under-test, the wafer-under-test having a wafer coefficient of thermal expansion and including an array of conductive contact pads disposed in a wafer-level-packaged pattern, the contact housing including:

a base plate consisting only of a glass-based material having a coefficient of thermal expansion matching that of the wafer coefficient of thermal expansion, the base plate formed with a plurality of spaced-apart cavities having openings corresponding to the wafer-level-packaged pattern of contact pads, the cavities formed to receive the compliant contact bodies;

a captive plate disposed in stacked relationship with the base plate and having apertures corresponding to the spaced-apart cavities, the apertures formed to allow the contact tips to pass therethrough while retaining the contact bodies within the cavities.

12. A contact housing adapted for receiving a plurality of compliant contacts, the contacts having contact bodies and contact tips, the contact housing for use to engage a wafer-under-test, the wafer-under-test having a wafer coefficient of thermal expansion and including an array of conductive contact pads disposed in a wafer-level-packaged pattern, the contact housing including:

a first base plate consisting only of a glass-based material having a coefficient of thermal expansion matching that of the wafer coefficient of thermal expansion, the base plate formed with a plurality of spaced-apart openings having counterbored cavities and necked-down throughbores corresponding to the wafer-level-packaged pattern of contact pads, the cavities formed to receive the compliant contact bodies, the throughbores formed to receive the contact tips; and

a second base plate formed similar to the first base plate and adapted for disposition in confronting relationship with first base plate to retain the compliant contacts within the respective cavities.

13. A wafer-level-contactor, the wafer-level-contactor for use to engage a wafer-under-test, the wafer-under-test having a wafer coefficient of thermal expansion and including an array of conductive contact pads disposed in a wafer-level-packaged pattern, the wafer-level-contactor including:

a plurality of compliant contacts;

a first plate formed with a first pattern of apertures, the first pattern of apertures corresponding to at least a portion of the wafer-level-packaged pattern, the first plate consisting only of a material having a coefficient of thermal expansion matching the wafer coefficient of thermal expansion; and

a second plate formed with a second pattern of apertures, the second pattern of apertures disposed in a spaced-apart relationship for registering vertically with the first pattern of apertures, the first and second plates cooperating to define a plurality of contact receptacles for nesting the plurality of compliant contacts.