Low voltage receiver circuit and method for shifting the differential input signals of the receiver depending on a common mode voltage of the input signals

• US 6,768,352 B1
• Filed: 11/13/2002
• Issued: 07/27/2004
• Est. Priority Date: 11/13/2002
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Maher, Kenneth A., Blake, Anthony
• Primary Examiner(s): LAM, TUAN THIEU
• Application Number:
  US10/293,392
• Time in Patent Office: 622 Days
• Field of Search: 327/108, 327/112, 327/333, 326/30, 326/82, 326/83, 326/86, 330/258, 330/260
• US Class Current: 327/112
• CPC Class Codes: H04L 25/0276 Arrangements for coupling common mode signals
• CPC Class Codes: H04L 25/028 Arrangements specific to the transmitter end
• CPC Class Codes: H04L 25/0292 Arrangements specific to the receiver end

Abstract

An improved communication system, receiver, and method are provided that can reduce input voltages received by the receiver whenever those voltages extend upward to the maximum common-mode voltage range. A detect circuit determines whether the input voltages are at or near the maximum range. If so, the detect circuit sends a control signal to a level shift circuit which will reduce the input voltages by a predefined amount. The reduced voltages can then be forwarded to a sense circuit which preferably operates at a power supply voltage that is less than the maximum differential input voltage (i.e., the maximum voltage on the differential pair of signals), or less than the maximum common-mode voltage of the differential input signals. The sense circuit can thereby operate at a relatively wide common-mode voltage range, and utilizes a lower power supply voltage. The sense circuit can also be made up of a relatively simple differential pair of transistors with corresponding resistor loads in order to sense a differential input voltage range of, for example, 800 millivolts to 2.4 volts prior to voltage reduction, and 800 millivolts to 2.0 volts after voltage reduction.

Claims

1. A receiver, comprising:

a detect circuit coupled to produce a control signal depending solely on a common mode voltage of a pair of differential input signals;

a level shift circuit coupled to receive the pair of differential input signals, and reduce the common mode voltage upon receiving the control signal; and

a sense circuit coupled to receive the reduced said common mode voltage.

2. The receiver as recited in claim 1, wherein the common mode voltage is a median between a pair of voltages corresponding to the differential input signals.

3. The receiver as recited in claim 2, wherein the sense circuit is coupled to receive a power supply voltage that is a pre-determined amount below a maximum voltage of the pair of voltages.

4. The receiver as recited in claim 2, wherein the sense circuit is coupled to receive a power supply voltage that is a pre-determined amount below a maximum voltage of the pair of voltages after having reduced the common mode voltage of the pair of voltages by the level shift circuit.

5. The receiver as recited in claim 1, wherein the detect circuit produces the control signal whenever the common mode voltage exceeds a pre-defined amount.

6. The receiver as recited in claim 1, wherein the sense circuit consists essentially of a pair of transistors coupled to a corresponding pair of resistor loads.

7. The receiver as recited in claim 6, wherein an output node is configured between each respective transistor and resistor load for producing a differential output from the receiver.

8. The receiver as recited in claim 1, wherein the level shift circuit comprises:

a pair of resistors coupled between the sense circuit and a corresponding pair of terminals to receive the pair of differential input signals; and

a pair of transistors coupled between the sense circuit and the corresponding pair of resistors to, upon receipt of the control signal, form a current path through the pair of resistors and thereby allow a voltage drop between the pair of terminals and the sense circuit.

9. The receiver as recited in claim 8, wherein the sense circuit comprises a pair of transistors having a gate or base terminal coupled to the corresponding pair of transistors and pair of transistors.

10. A transmission system, comprising:

a driver coupled to produce a pair of differential signals;

a transmission path;

a receiver coupled to receive the pair of differential signals via the transmission path, and wherein the receiver comprises;

a detect circuit coupled to produce a control signal whenever a common mode voltage of the pair of differential signals exceeds a pre-defined amount;

a level shift circuit that, upon receiving the control signal, reduces each voltage of the pair of differential signals, so that the maximum voltage of said each voltage exceeds a supply voltage, but does not exceed the supply voltage by more than the pre-determined amount; and

a sense circuit coupled to receive the reduced each said voltage of the pair of differential signals.

11. The transmission system as recited in claim 10, wherein the pre-defined amount is in the range of approximately 1.0 volts to 1.5 volts.

12. The transmission system as recited in claim 10, wherein the pre-determined amount is in the range of approximately 150 millivolts to 250 millivolts.

13. The transmission system as recited in claim 10, wherein the pre-determined amount is in the range of approximately 175 millivolts to 225 millivolts.

14. The transmission system as recited in claim 10, wherein the amount by which the level shift circuit reduces each voltage of the differential input signal is in the range of approximately 350 millivolts to 450 millivolts.

15. The transmission system as recited in claim 10, wherein the amount by which the level shift circuit reduces each voltage of the differential input signal is in the range of approximately 375 millivolts to 425 millivolts.

16. The transmission system as recited in claim 10, wherein the supply voltage is approximately 1.8 volts, and the maximum voltage of each said voltage is approximately 2.0 volts.

17. The transmission system as recited in claim 10, wherein the sense circuit consists essentially of a pair of transistors coupled to a corresponding pair of resistor loads.

18. The transmission system as recited in claim 17, wherein the sense circuit comprises an output node configured between each respective transistor and resistor load for producing a differential output from the receiver.

19. A method of adjusting differential input signals, comprising:

when a common mode voltage of the differential input signals exceeds a pre-defined amount, reducing the voltages of the differential input signals;

when a common mode voltage of the differential input signals does not exceed a pre-defined amount, not reducing the voltages of the differential input signals; and

forwarding the reduced or non-reduced differential input signals to a sense circuit.

20. The method as recited in claim 19, wherein said reducing comprises shifting each of the voltages of the differential input signals in the range of approximately 350 millivolts to 450 millivolts.

21. The method as recited in claim 19, wherein said reducing comprises forwarding current through a resistor that has one end coupled to a transistor current path which is selectable depending on the amount by which the common mode voltage exceeds the pre-defined amount.