Verifying proximity of ground metal to signal traces in an integrated circuit

• US 6,769,102 B2
• Filed: 07/19/2002
• Issued: 07/27/2004
• Est. Priority Date: 07/19/2002
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Co. (HP Inc.)
• Inventors: Nelson, Jerimy, Moldauer, Peter Shaw, Frank, Mark D.
• Primary Examiner(s): Siek, Vuthe
• Assistant Examiner(s): Bowers, Brandon
• Application Number:
  US10/199,127
• Publication Number:
  US 20040015795A1
• Time in Patent Office: 739 Days
• Field of Search: 716/5, 716/4, 716/1
• US Class Current: 716/112
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

Techniques are disclosed for verifying the proximity of signal return paths (e.g., ground metal or power) to signal traces in an integrated circuit package design. A package designer creates the package design using a package design tool. A proximity verifier verifies that there is a signal return path within a predetermined threshold distance of each specified signal trace in the package layers directly above and/or below the signal trace. The proximity verifier may notify the package designer of any signal traces which are not sufficiently close to signal return paths, such as by providing visual indications of such signal traces in a graphical representation of the package design. In response, the package designer may modify the package model to ensure that all signal traces are sufficiently close to signal return paths.

Claims

1. A computer-implemented method comprising steps of:

(A) identifying a segment of a signal trace in a first layer of an integrated circuit design; and

(B) determining whether there is a signal return path, in a second layer of the integrated circuit design, within a predetermined threshold distance from the signal trace segment by performing steps of;

(1) identifying coordinates of a first signal return path in the second layer of the integrated circuit design; and

(2) determining whether the segment coordinates differ from the first signal return path coordinates by more than the predetermined threshold distance.

2. The method of claim 1, wherein the step (B) (1) comprises a step of identifying a plurality of coordinates of the first signal return path in the second layer of the integrated circuit design, and wherein the step (B) (2) comprises steps of:

(B) (2) (a) determining whether the segment coordinates differ from any of the plurality of signal return path coordinates by more than the predetermined threshold distance;

(B) (2) (b) determining that there is no signal return path within the predetermined threshold distance of the signal trace segment if it is determined in step (B) (2) (a) that the segment coordinates differ from any of the signal return path coordinates by more than the predetermined threshold distance; and

(B) (2) (c) determining that there is a signal return path within the predetermined threshold distance of the signal trace segment if it is determined in step (B) (2) (a) that the segment coordinates differ from none of the signal return path coordinates by more than the predetermined threshold distance.

3. The method of claim 2, wherein the first signal return path comprises all signal return paths in the second layer.

4. The method of claim 1, wherein the segment coordinates comprise two-dimensional coordinates within the first layer of the integrated circuit design, wherein the first signal return path coordinates comprise two-dimensional coordinates within the second layer of the integrated circuit design, and wherein the step (B) (2) comprises steps of:

(B) (2) (a) identifying the length of a line having as endpoints the segment coordinates and the first signal return path coordinates;

(B) (2) (b) determining that the segment coordinates differ from the first signal return path coordinates by more than the predetermined threshold distance if the length of the identified line is greater than the predetermined threshold distance; and

(B) (2) (c) determining that the segment coordinates do not differ from the first signal return path coordinates by more than the predetermined threshold distance if the length of the identified line is not greater than the predetermined threshold distance.

5. The method of claim 1, wherein the segment coordinates comprise coordinates of the midpoint of the segment.

6. The method of claim 1, wherein the segment coordinates comprise coordinates of the endpoints of the segment.

7. The method of claim 1, wherein the signal trace segment comprises one of a plurality of segments of the signal trace, and wherein the method further comprises a step of:

(C) performing the steps (A) and (B) for each of the plurality of segments.

8. The method of claim 7, wherein the signal trace comprises one of a plurality of signal traces in the first layer of the integrated circuit design, and wherein the method further comprises a step of:

(D) performing the step (C) for each of the plurality of signal traces.

9. The method of claim 1, wherein the integrated circuit design comprises a computer-implemented model of an integrated circuit tangibly stored in a computer-readable medium.

10. The method of claim 1, wherein the first and second layers comprise adjacent layers in the integrated circuit design.

11. The method of claim 1, further comprising a step of:

(C) providing an error indication if it is determined in the step (B) that there is no signal return path in the second layer within the predetermined threshold distance from the signal trace segment.

12. The method of claim 11, wherein the indication comprises a visual indication in a graphical representation of the integrated circuit design.

13. The method of claim 1, further comprising steps of:

(C) determining whether there is a signal return path, in a third layer of the integrated circuit design, within the predetermined threshold distance from the signal trace segment.

14. The method of claim 13, wherein the first layer is disposed between the second layer and the third layer in the integrated circuit design.

15. The method of claim 13, further comprising a step of:

(D) providing an error indication if it is determined in the steps (B) and (C) that that there is no signal return path in either the second or third layer within the predetermined threshold distance from the signal trace segment.

16. The method of claim 1, wherein the signal return path comprises ground metal.

17. The method of claim 1, wherein the signal return path comprises power.

18. A system comprising:

a computer-readable medium tangibly embodying an integrated circuit design comprising a first layer and a second layer; and

segment identification means for identifying a segment of a signal trace in the first layer of an integrated circuit design, the segment identification means comprising means for identifying coordinates of the signal trace segment; and

first proximity verification means for determining whether there is a signal return path, in the second layer of the integrated circuit design, within a predetermined threshold distance from the signal trace segment, the first proximity verification means comprising;

first signal return path coordinate identification means for identifying coordinates of a first signal return path in the second layer of the integrated circuit design; and

first coordinate comparison means for determining whether the segment coordinates differ from the first signal return path coordinates by more than the predetermined threshold distance.

19. The system of claim 18, wherein the first signal return path coordinate identification means comprises means for identifying a plurality of coordinates of the first signal return path in the second layer of the integrated circuit design, and wherein the first coordinate comparison means comprises:

means for determining whether the segment coordinates differ from any of the plurality of signal return path coordinates by more than the predetermined threshold distance;

means for determining that there is no signal return path within the predetermined threshold distance of the signal trace segment if it is determined that the segment coordinates differ from any of the signal return path coordinates by more than the predetermined threshold distance; and

means for determining that there is a signal return path within the predetermined threshold distance of the signal trace segment if it is determined that the segment coordinates differ from none of the signal return path coordinates by more than the predetermined threshold distance.

20. The system of claim 19, wherein the first signal return path comprises all signal return paths in the second layer.

21. The system of claim 18, wherein the segment coordinates comprise two-dimensional coordinates within the first layer of the integrated circuit design, wherein the first signal return path coordinates comprise two-dimensional coordinates within the second layer of the integrated circuit design, and wherein the first coordinate comparison means comprises:

means for identifying the length of a line having as endpoints the segment coordinates and the first signal return path coordinates;

means for determining that the segment coordinates differ from the first signal return path coordinates by more than the predetermined threshold distance if the length of the identified line is greater than the predetermined threshold distance; and

means for determining that the segment coordinates do not differ from the first signal return path coordinates by more than the predetermined threshold distance if the length of the identified line is not greater than the predetermined threshold distance.

22. The system of claim 18, wherein the segment coordinates comprise coordinates of the midpoint of the segment.

23. The system of claim 18, wherein the segment coordinates comprise coordinates of the endpoints of the segment.

24. The system of claim 18, wherein the signal trace segment comprises one of a plurality of segments of the signal trace, and wherein the system further comprises:

segment iteration means for applying the segment identification means and the first proximity verification means to each of the plurality of segments.

25. The system of claim 24, wherein the signal trace comprises one of a plurality of signal traces in the first layer of the integrated circuit design, and wherein the system further comprises:

means for applying the segment iteration means to each of the plurality of signal traces.

26. The system of claim 18, wherein the integrated circuit design comprises a computer-implemented model of an integrated circuit tangibly stored in a computer-readable medium.

27. The system of claim 18, wherein the first and second layers comprise adjacent layers in the integrated circuit design.

28. The system of claim 18, further comprising:

means for providing an error indication if it is determined that there is no signal return path in the second layer within the predetermined threshold distance from the signal trace segment.

29. The system of claim 28, wherein the indication comprises a visual indication in a graphical representation of the integrated circuit design.

30. The system of claim 18, further comprising:

means for determining whether there is a signal return path, in a third layer of the integrated circuit design, within the predetermined threshold distance from the signal trace segment.

31. The system of claim 30, wherein the first layer is disposed between the second layer and the third layer in the integrated circuit design.

32. The system of claim 30, further comprising:

means for providing an error indication if it is determined that that there is no signal return path in either the second or third layer within the predetermined threshold distance from the signal trace segment.

33. The system of claim 18, wherein the segment identification means and the first proximity verification means comprise a computer program written in the Skill scripting language.

34. The system of claim 18, wherein the segment identification means and the first proximity verification means comprise a design rule tangibly embodied in the computer-readable medium, wherein the design rule is defined according to a specification associated with an electronic design automation tool.

35. The system of claim 34, wherein the integrated circuit design includes the design rule.

36. The system of claim 18, wherein the signal return path comprises ground metal.

37. The system of claim 18, wherein the signal return path comprises power.