Method of depositing a low dielectric with organo silane
First Claim
1. A process for depositing an intermetal dielectric layer on a semiconductor substrate, comprising reacting one or more silicon compounds with an oxidizing gas while applying RF power to deposit the intermetal dielectric layer on the semiconductor substrate, wherein each silicon compound comprises the structure:
- wherein the RF power is provided by a mixed frequency power source and wherein the intermetal dielectric layer retains sufficient silicon-carbon bonds to have a dielectric constant of about 3 or less.
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Abstract
A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.
136 Citations
34 Claims
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1. A process for depositing an intermetal dielectric layer on a semiconductor substrate, comprising reacting one or more silicon compounds with an oxidizing gas while applying RF power to deposit the intermetal dielectric layer on the semiconductor substrate, wherein each silicon compound comprises the structure:
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wherein the RF power is provided by a mixed frequency power source and wherein the intermetal dielectric layer retains sufficient silicon-carbon bonds to have a dielectric constant of about 3 or less. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A process for depositing an interconnect on a semiconductor substrate, comprising:
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depositing a dielectric layer by reacting a silicon compound with an oxidizing gas while applying RF power, wherein the silicon compound comprises the structure;
wherein the RF power is provided by a mixed frequency power source and wherein the dielectric layer retains sufficient silicon-carbon bonds to have a dielectric constant of about 3 or less;
etching at least one opening in the dielectric layer; and
depositing a conductive material in the opening. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A process for depositing an interconnect on a semiconductor substrate, comprising:
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depositing a conformal lining layer on a patterned metal layer from process gases comprising one or more silicon compounds and an oxidizing gas while applying RF power, wherein at least one of the silicon compounds comprises the structure;
and wherein the conformal lining layer retains sufficient silicon-carbon bonds to have a dielectric constant of about 3 or less; and
depositing a gap filling layer on the conformal lining layer. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32, 33, 34)
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Specification