Displaying substrate and liquid crystal display device having the same

• US 6,771,348 B2
• Filed: 05/30/2002
• Issued: 08/03/2004
• Est. Priority Date: 10/19/2001
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Yoon, Ju-Young, Yoo, Hyeong-Suk, Oh, Weon-Sik, Cho, Won-Gu
• Primary Examiner(s): Nguyen, Dung T.
• Assistant Examiner(s): Caley, Michael H.
• Application Number:
  US10/159,149
• Publication Number:
  US 20030164919A1
• Time in Patent Office: 796 Days
• Field of Search: 349/149, 349/151, 349/152, 349/150, 174/260, 174/262, 174/263, 174/265, 174/266, 174/258, 174/259, 361/748-751, 361/760-762, 361/780, 361/790-795
• US Class Current: 349/152
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/0979 Redundant conductors or connections, i.e. more than one current path between two points
• CPC Class Codes: H05K 2201/10136 Liquid Crystal display [LCD]
• CPC Class Codes: H05K 3/323 by applying an anisotropic conductive adhesive layer over an array of pads
• CPC Class Codes: H05K 3/361 Assembling flexible printed circuits with other printed circuits

Abstract

Disclosed are a displaying substrate and a liquid crystal display device having the same. A pad portion formed on the displaying substrate has a plurality of via holes for exposing a pad metal layer. A width of the via hole is smaller than a diameter of a conductive particle. Where the width of the via hole is larger than the diameter of the conductive particle, a depth of the via hole is smaller than the diameter of the conductive particle. Thus, a driving failure which may occur in the pad portion is prevented while maintaining a deformation ratio of the conductive particle at about 20˜60%, thereby enhancing a connecting force between the pad portion and a circuit substrate.

Claims

1. A displaying substrate comprising at least one pad portion for receiving an electrical signal from a circuit substrate, said pad portion comprising:

a pad metal layer formed on said displaying substrate and having a pad area;

a passivation layer for covering said pad metal layer, said passivation layer having a plurality of via holes to partially expose said pad area; and

a conductive layer, formed over said passivation layer corresponding to said pad area, said conductive layer being electrically connected to said pad metal layer through said via holes

wherein said via holes each have a width smaller than a diameter of a conductive particle of a conductive film of said circuit substrate, so that said conductive particle is in contact with an upper portion of said via hole and no contact exists between said conductive particle and a bottom of said via hole.

2. The displaying substrate as claimed in claim 1, wherein said circuit substrate includes an output port, said output port being electrically connected to said conductive layer by an anisotropic conductive film interposed therebetween.

3. The displaying substrate as claimed in claim 2, wherein a depth of each of said via holes is smaller than a diameter of a conductive particle of said anisotropic conductive film.

4. The displaying substrate as claimed in claim 3, wherein the depth of said via hole is 0.8 to 0.4 times of the diameter of said conductive particle.

5. The displaying substrate as claimed in claim 1, wherein a deformation ratio of said conductive particle is about 20 ˜

60%.

6. The displaying substrate as claimed in claim 1, wherein the width of said via hole is smaller than 0.8 times of the diameter of said conductive particle.

7. The displaying substrate as claimed in claim 1, wherein said via holes has a shape of rectangles, squares, circles or ellipses when viewed front an upper side of said displaying substrate.

8. The displaying substrate as claimed in claim 1, wherein said displaying substrate is used for one of LCD, PDP, FED and EL.

9. The displaying substrate as claimed in claim 1, wherein each or said via holes has said width and a depth, said width being smaller than said depth.

10. The displaying substrate as claimed in claim 9, wherein said pad metal layer and said conductive layer are in contact with each other only through said bottom of said via hole.

11. A liquid crystal display device comprising:

a liquid crystal display panel including a) a plurality of pixel portions formed on a substrate, b) a pad portion which has a pad metal layer extended from one end portion of a plurality of signal lines connected to said pixel portions and having a pad area, a passivation layer for covering said pad metal layer and having a plurality of via holes to partially expose said pad area, and a conductive layer formed on said passivation layer corresponding to said pad area and electrically connected to said pad metal layer through said via holes; and

a circuit substrate having an output port electrically connected to said pad portion or said liquid crystal display panel for applying an electrical signal to said liquid crystal display panel

wherein said via holes each have a width smaller than a diameter of a conductive particle of a conductive film of said circuit substrate, so that said conductive contact with an upper portion of said via hole and no contact exists between said conductive particle and a bottom of said via hole.

12. The liquid crystal display device as claimed in claim 11, wherein said output port of said circuit substrate is electrically connected to said conductive layer by an anisotropic conductive film interposed therebetween.

13. The liquid crystal display device as claimed in claim 12, wherein a depth of each of said via holes is smaller than a diameter of a conductive particle of said anisotropic conductive film.

14. The displaying substrate as claimed in claim 13, wherein the depth of said via hole is 0.8 to 0.4 times of the diameter of said conductive particle.

15. The displaying substrata as claimed in claim 11, wherein the width of said via hole is smaller than 0.8 times of the diameter of said conductive particle.

16. The liquid crystal display device as claimed in claim 11, wherein each of said via holes has said width and a depth, said width being smaller than said depth.

17. The liquid crystal display device as claimed in claim 16, wherein said pad metal layer and said conductive layer are in contact with each other only through said bottom of said via hole.