Smart tester and method for testing a bus connector

• US 6,772,380 B1
• Filed: 04/20/2000
• Issued: 08/03/2004
• Est. Priority Date: 04/21/1999
• Status: Expired due to Fees

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Ali, Abbas, Falvey, Mark J.
• Primary Examiner(s): LAMARRE, GUY J
• Application Number:
  US09/553,078
• Time in Patent Office: 1,566 Days
• Field of Search: 714/42, 714/25, 714/44, 714/47-48, 714/724, 324/537, 324/543, 324/538, 324/539, 324/765, 324/771, 324/713, 324/73.1, 324/628, 735/73, 710/62-64, 710/104, 710/100, 710/300-302, 379/21-24, 379/27.01, 379/30, 361/679
• US Class Current: 714/724
• CPC Class Codes: G01R 31/69 of terminals at the end of a cable or a wire harness; of plugs; of sockets, e.g. wall sockets or power sockets in appliances

Abstract

A system for testing a bus connector comprising an electronically controlled switch operatively coupled to be controlled by a microprocessor, the system having a first input operatively coupled to receive power from an internal power supply and a second input operatively coupled to receive power from a power supply connector, and an output operatively coupled to power an output display selectively from either power supplies.

Claims

1. A system for testing a bus connector comprising:

a microprocessor;

a first analog multiplexor operatively coupled to be controlled by the microprocessor;

an analog-to-digital converter (ADC) circuit operatively coupled to receive an analog signal from the first analog multiplexor and to provide a digital signal to the microprocessor;

a first electrical connector including a plurality of connection pins suitable for connection to the bus connector, and operatively coupled to provide inputs to the first analog multiplexor;

an analog demultiplexor operatively coupled to be controlled by the microprocessor, and including a plurality of analog output connections operatively coupled to the first electrical connector;

a voltage source operatively coupled to provide at least one predetermined voltage signal as an input to the analog demultiplexor;

a second electrical connector having a plurality of connection pins suitable for connection to a power-supply connector, and operatively coupled to provide inputs to the first analog multiplexor;

an output display;

an internal power supply; and

an electronically controlled switch operatively coupled to be controlled by the microprocessor, and having a first input operatively coupled to receive power from the internal power supply, a second input operatively coupled to receive power from the second electrical connector, and an output operatively coupled to provide power to the output display such that either the internal power supply or the second electrical connector provides power to run the output display.

2. The system according to claim 1, wherein the microprocessor controls the system to apply the at least one predetermined voltage signal to one pin of the bus connector at a time, and then to test each one of a plurality of the other pins to determine whether the applied voltage does travel to the other pins to which the signal should go and does not travel to the other pins to which the signal should not go.

3. The system according to claim 1, wherein the voltage source provides a plurality of voltages, and further comprising:

a second analog multiplexor operatively coupled to be controlled by the microprocessor, and operatively coupled to receive the plurality of voltages from the voltage source, and operatively coupled to provide an output signal to an input of the analog demultiplexor.

4. The system according to claim 3, wherein the microprocessor at a first time:

controls the second analog multiplexor and the analog demultiplexor to operatively couple a first one of the plurality of voltages to a first one of the connection pins, and

controls the first analog multiplexor to operatively couple a second one of the connection pins to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the second pin that resulted from applying the first voltage to the first pin.

5. The system according to claim 4, wherein the microprocessor at a second time:

controls the second analog multiplexor and the analog demultiplexor to operatively couple the first one of the plurality of voltages to a third one of the connection pins, and

controls the first analog multiplexor to operatively couple a fourth one of the connection pins to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the fourth pin that resulted from applying the first voltage to the third pin.

6. The system according to claim 5, wherein the microprocessor at a third time:

controls the second analog multiplexor and the analog demultiplexor to operatively couple a second one of the plurality of voltages to a first one of the connection pins, and

controls the first analog multiplexor to operatively couple a second one of the connection pins to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the second pin that resulted from applying the second voltage to the first pin.

7. The system according to claim 4, wherein the microprocessor at a fourth time:

controls the second analog multiplexor and the analog demultiplexor to operatively couple a second one of the plurality of voltages to a first one of the connection pins, and

controls the first analog multiplexor to operatively couple a second one of the connection pins to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the second pin that resulted from applying the second voltage to the first pin.

8. The system according to claim 1, further comprising:

an electrical load;

wherein the electronically controlled switch operatively coupled to be controlled by the microprocessor is operable to selectively connect the electrical load to the second electrical connector,

wherein the second electrical connector is operatively coupled to provide one or more inputs to the first analog multiplexor, and wherein the microprocessor at a fifth time;

controls the electronically controlled switch to operatively couple a pin of the second electrical connector to the electrical load, and

controls the first analog multiplexor to operatively couple the pin of the second electrical connector to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the pin of the second electrical connector that resulted from operatively coupling the pin of the second electrical connector to the electrical load.

9. The system according to claim 1, wherein the second electrical connector is operatively coupled to provide one or more inputs to the first analog multiplexor, and wherein the microprocessor at a sixth time:

controls the electronically controlled switch to operatively couple a pin of the second electrical connector to the output display, and

controls the first analog multiplexor to operatively couple the pin of the second electrical connector to the ADC circuit, in order to receive into the microprocessor a digital value from the ADC circuit representative of the voltage on the pin of the second electrical connector that resulted from operatively coupling the pin of the second electrical connector to the output display.