Method and circuit for compensating MOSFET capacitance variations in integrated circuits

• US 6,774,644 B2
• Filed: 04/10/2002
• Issued: 08/10/2004
• Est. Priority Date: 04/02/2002
• Status: Expired due to Term

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Eberlein, Matthias
• Primary Examiner(s): Le, N.
• Assistant Examiner(s): Lair, Donald M
• Application Number:
  US10/119,924
• Publication Number:
  US 20030184315A1
• Time in Patent Office: 853 Days
• Field of Search: 324/658, 324/682, 324/681, 331/111, 331/176, 331/152, 331/175, 331/36.C, 331/18, 331/135, 327/512, 327/513, 327/93, 327/362, 327/378, 323/311, 323/313, 323/315
• US Class Current: 324/682
• CPC Class Codes: H03K 3/011 Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature to maintain energy constant H03K3/015
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence

Abstract

A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Claims

1. A method for generating a constant charging time in a MOS capacitor, said method comprising:

providing a MOS transistor and a MOS capacitor each having the same gate oxide thickness and said MOS transistor having a native threshold voltage Vth;

sensing said native threshold voltage Vth of said native MOS transistor;

generating a reference voltage level comprising a sum of said native threshold voltage Vth and a constant voltage Vx; and

charging said MOS capacitor up to said reference voltage level Vref=Vx+Vth wherein charging consumes a constant time.

2. The method of claim 1 wherein said MOS transistor is of NMOS type.

3. The method of claim 1 wherein said MOS transistor is of PMOS type.

4. The method of claim 1 further comprising measuring a capacitance related value in a suitable configuration for oscillators wherein said capacitance related value measured is the charging time of said MOS capacitor.

5. The method of claim 4 wherein said capacitance related value measured is the resulting frequency.

6. The method of claim 4 wherein said suitable configuration for oscillators is a feedback configuration.

7. The method of claim 4 wherein said suitable configuration for oscillators is a repeating configuration.