Display driver IC

• US 6,774,892 B2
• Filed: 09/11/2001
• Issued: 08/10/2004
• Est. Priority Date: 09/13/2000
• Status: Active Grant

• Current Assignee: 138 East LCD Advancements Limited (Vector Capital Corporation)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Itomi, Noboru, Tamura, Tsuyoshi
• Primary Examiner(s): WU, XIAO MIN
• Application Number:
  US09/954,338
• Publication Number:
  US 20020096679A1
• Time in Patent Office: 1,064 Days
• Field of Search: 345/204, 345/205, 345/98, 345/100, 345/571, 345/572, 345/573, 345/574, 345/536, 365/220, 365/210, 365/230.01, 365/230.03, 365/230.04, 365/230.05, 365/230.06, 365/189.01, 365/189.02, 365/189.03, 365/189.05
• US Class Current: 345/204
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes
• CPC Class Codes: G11C 2207/002 Isolation gates, i.e. gates coupling bit lines to the sense amplifier
• CPC Class Codes: G11C 7/18 Bit line organisation; Bit line lay-out
• CPC Class Codes: G11C 8/16 Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups

Abstract

A display driver IC with a built-in RAM that can restrain an increase in its power consumption even when the total number of memories in the column direction increases. Such a display driver IC has a main read line that is commonly used by memory cells in the same column arranged along a column direction and transmits display data that is read from successively selected memory cells. The memory cells are divided at a specified number thereof in the column direction to form blocks. Each of the column-blocks is provided with a sub-read line, and display data read from one of the memory cells in each of the blocks is transferred through the corresponding sub-read line. A main switch is provided to selectively connect a corresponding one of the sub-read lines to the main read line. Each of the memory cells is provided with a sub-switch that selectively connects to a corresponding sub-read line.

Claims

1. A display driver IC, comprising:

a plurality of memory cells arranged in a column direction and divided into a plurality of blocks, each block containing a specified number of memory cells;

a plurality of display word lines that successively select the plurality of memory cells in the column direction;

a main read line commonly shared by the plurality of memory cells, which transfers display data read from each one of the memory cells that are successively selected by the plurality of display word lines;

a plurality of sub-read lines, one for each column-block of memory cells for transferring display data read from each one of the memory cells in that column-block;

a plurality of main switches, one for each column-block for selectively connecting a corresponding one of the sub-read lines to the main read line; and

a plurality of sub-switches, one for each of the plurality of memory cells, and selected by a respective one of the display word lines to thereby connect that memory cell to a corresponding one of the sub-read lines.

2. A display driver IC according to claim 1, further comprising a plurality of pre-charge devices, one connected to each of the sub-read lines, for pre-charging a read path prior to a reading operation.

3. A display driver IC according to claim 1, further comprising a pre-charge device connected to the main read line for pre-charging a read path prior to a reading operation.

4. A display driver IC according to claim 2, further comprising an additional pre-charge device connected to the main read line for pre-charging a read path prior to a reading operation.

5. A display driver IC according to claim 1, wherein the plurality of display word lines include:

a plurality of main word lines, one for each block, for selectively turning on a corresponding one of the main switches; and

a plurality of sub-word lines in each column-block for selecting a corresponding one of the memory cells in that column-block.

6. A display driver IC according to claim 5, wherein each of the main word lines is activated by an upper bit signal of an address signal to thereby turn on a corresponding one of the main switches.

7. A display driver IC according to claim 6, wherein each of the sub-word lines is activated by a lower bit signal of the address signal to thereby turn on a corresponding one of the sub-switches.

8. A display driver IC according to claim 3, wherein each pre-charge device pre-charges both of the main read line and the corresponding one of the sub-word lines during a period in which one of the main switches is turned on and before a period in which one of the sub-switches is turned on.

9. A display driver IC according to claim 1, wherein the total number of the plurality of memory cells is 280 or greater.

10. A display unit, comprising:

a display device; and

the display driver IC as defined by claim 1.

11. An electrical device, comprising:

the display unit as defined by claim 10.