CCD output processing stage that amplifies signals from colored pixels based on the conversion efficiency of the colored pixels

• US 6,774,941 B1
• Filed: 10/26/1999
• Issued: 08/10/2004
• Est. Priority Date: 10/26/1999
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: McMahon, Andrew Kenneth John, Boisvert, David Michael
• Primary Examiner(s): Garber, Wendy R.
• Assistant Examiner(s): Ye, Lin
• Application Number:
  US09/427,574
• Time in Patent Office: 1,750 Days
• Field of Search: 348/241, 348/243, 348/264, 348/255, 348/250, 348/245, 348/247, 348/364, 358/518, 358/519
• US Class Current: 348/241
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/633 by using optical black pixels
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

The reduced signal-to-noise ratio of colored pixels that results from a lower conversion efficiency is eliminated by utilizing a programmable gain amplifier which individually applies a gain to the output of each colored pixel so that the maximum signal level of each colored pixel is matched to the maximum input range of an A/D converter.

Claims

1. An image processing stage for processing an image signal, the image signal having a plurality of pixel periods, the stage comprising:

a correlated double sampler (CDS) connectable to receive the image signal, the CDS removing an effect of a reset signal from the image signal in each pixel period to leave a residual signal in each pixel period;

a digital-to-analog (D/A) converter that converts offset values into offset signals and outputs the offset signals, the residual signal in each pixel period being combined with an offset signal to leave an offset-corrected signal in each pixel period;

a programmable gain amplifier (PGA) that receives gain values, and amplifies the offset-corrected signal in each pixel period by a gain value of the gain values to form an amplified signal in each pixel period;

an analog-to-digital (A/D) converter that digitizes the amplified signal in each pixel period to form a digitized value for each pixel period; and

a controller that outputs the offset values to the D/A converter, and the gain values to the amplifier.

2. The stage of claim 1 wherein the residual signal within a pixel period corresponds with an imaging pixel that captures a color, the offset signal within the pixel period corresponds with the color, and the gain value used to amplify the offset corrected signal within the pixel period corresponds with the color.

3. The stage of claim 2 wherein

the image signal includes a data signal portion that includes photon information, and a black signal portion that includes non-photon information;

the black signal portion of the residual signal in a first pixel period is combined with a first offset value;

the data signal portion of the residual signal in a second pixel period is combined with the first offset value;

the black signal portion of the residual signal in a third pixel period is combined with a second offset value; and

the data signal portion of the residual signal in a fourth pixel period is combined with the second offset value.

4. The stage of claim 3 wherein

the black signal portion of the offset corrected signal in a pixel period is amplified by a first gain;

the data signal portion of the offset corrected signal in a pixel period is amplified by the first gain;

the black signal portion of the offset corrected signal in a pixel period is amplified by a second gain; and

the data signal portion of the offset corrected signal in a pixel period is amplified by the second gain.

5. The stage of claim 4 wherein

the offset signal output for a pixel period is equal to a value needed to remove error signals added by the CDS, the PGA, and the A/D converter, and non-photon based charge;

the CDS, the D/A converter, and the PGA are connected to a first node; and

D/A converter outputs the offset signals to the first node so that an offset signal is output during each pixel period.

6. The stage of claim 4 and further comprising an update circuit that forms an average digitized black value from a first number of black signal portions of the image signal, compares the average digitized black value with a digital reference value to form a calculated value for the first number of black signal portions, and accumulates the calculated value to form an accumulated calculated value, wherein the controller updates the first offset value with the accumulated calculated value.

7. An image processing stage that processes an image signal that has a first portion that corresponds with a first color and an adjoining second portion that corresponds with a different second color, the stage comprising:

a correlated double sampler (CDS) that receives the image signal, removes a reset component from the image signal to leave a residual signal that has a first portion that corresponds with the first color and an adjoining second portion that corresponds with the second color, and outputs the residual signal;

a digital-to-analog (D/A) converter that converts a first offset value into a first offset signal that corresponds with the first color, and a second offset value into a second offset signal that corresponds with the second color, and outputs the first and second offset signals, the first and second offset signals being different;

a programmable gain amplifier (PGA) that receives an offset corrected signal, a first gain value that corresponds with the first color, and a second gain value that corresponds with the second color, the offset corrected signal having a first portion that represents a combination of the first portion of the residual signal and the first offset signal, and an adjoining second portion that represents a combination of the second portion of the residual signal and the second offset signal, the PGA amplifying the first portion of the offset corrected signal with the first gain value and the second portion of the offset corrected signal with the second gain value, the first and second gain values being different; and

a controller that outputs the first and second offset values to the D/A converter, and the first and second gain values to the amplifier.

8. The stage of claim 7 wherein:

the input signal has a third portion that represents a third color, the first, second, and third colors being different;

the residual signal output by the CDS has a third portion that represents the third color;

the (D/A) converter converts a third offset value into a third offset signal that corresponds with the third color and outputs the third offset signal, the first, second, and third offset signals being different;

the offset corrected signal received by the PGA has a third portion that represents a combination of the third portion of the residual signal and the third offset value;

the PGA receives a third gain value that corresponds with the third color and amplifies the third portion of the offset corrected signal with the third gain value;

the first, second, and third gain values being different; and

the controller outputs the third offset value and the third gain value.

9. The stage of claim 8 wherein:

the input signal has a fourth portion that represents a fourth color, the first, second, third, and fourth colors being different;

the residual signal output by the CDS has a fourth portion that represents the fourth color;

the (D/A) converter converts a fourth offset value into a fourth offset signal that corresponds with the fourth color and outputs the fourth offset signal, the first, second, third, and fourth offset signals being different;

the offset corrected signal received by the PGA has a fourth portion that represents a combination of the fourth portion of the residual signal and the fourth offset value;

the PGA receives a fourth gain value that corresponds with the fourth color and amplifies the fourth portion of the offset corrected signal with the fourth gain value, the first, second, third, and fourth gain values being different; and

the controller outputs the fourth offset value and the fourth gain value.

10. The stage of claim 7 wherein the first and second colors are non-black.

11. The stage of claim 8 wherein the first, second, and third colors are non-black.

12. The stage of claim 10 wherein:

the input signal has a third portion that corresponds with black;

the residual signal output by the CDS has a third portion that corresponds with black;

the offset corrected signal received by the PGA has a third portion that represents a combination of the third portion of the residual signal and the first offset value; and

the PGA amplifies the third portion of the offset corrected signal with the first gain value.

13. The stage of claim 11 wherein:

the input signal has a fourth portion that corresponds with black;

the residual signal output by the CDS has a fourth portion that corresponds with black;

the offset corrected signal received by the PGA has a fourth portion that represents a combination of the fourth portion of the residual signal and the first offset value; and

the PGA amplifies the fourth portion of the offset corrected signal with the first gain value.

14. The stage of claim 9 wherein:

the input signal has a fifth portion that corresponds with black;

the residual signal output by the CDS has a fifth portion that corresponds with black;

the offset corrected signal received by the PGA has a fifth portion that represents a combination of the fifth portion of the residual signal and the first offset value; and

the PGA amplifies the fifth portion of the offset corrected signal with the first gain value.

15. The stage of claim 7 wherein the image signal is generated by a pixel array, and the first and second portions of the image signal are generated by adjoining pixels on a same line.

16. The stage of claim 8 wherein the image signal is generated by a pixel array, the first and second portions of the image signal are generated by adjoining pixels on a first line, and the third portion of the image signal is generated by a pixel on a second adjoining line.

17. The stage of claim 12 and further comprising:

an analog-to-digital (A/D) converter that receives an amplified signal from the PGA, the amplified signal having a first portion that corresponds with the first color, an adjoining second portion that corresponds with the second color, and a third portion that corresponds with black, and digitizes the amplified signal to form a first value that represents the first portion of the amplified signal, a second value that represents the second portion of the amplified signal, and a third value that represents the third portion of the amplified signal; and

an update circuit that forms an updated digitized black value using the third value; and

wherein the controller updates the first offset value with the updated digitized black value.

18. The stage of claim 7 wherein:

the input signal has a third portion and an adjoining fourth portion that both correspond with black;

the residual signal output by the CDS has a third portion and a fourth portion that both correspond with black;

the offset corrected signal received by the PGA has a third portion that represents a combination of the third portion of the residual signal and the first offset value, and a fourth portion that represents a combination of the fourth portion of the residual signal and the first offset value; and

the PGA amplifies the third and fourth portions of the offset corrected signal with the first gain value.

19. The stage of claim 18 and further comprising:

an analog-to-digital (A/D) converter that receives an amplified signal from the PGA, the amplified signal having a first portion that corresponds with the first color, an adjoining second portion that corresponds with the second color, a third portion that corresponds with black, and a fourth portion that corresponds with black, and digitizes the amplified signal to form a first value that represents the first portion of the amplified signal, a second value that represents the second portion of the amplified signal, a third value that represents the third portion of the amplified signal, and a fourth value that represents the fourth portion of the amplified signal; and

an update circuit that forms an updated digitized black value using the third and fourth values; and

wherein the controller updates the first offset value with the updated digitized black value.

20. The stage of claim 7 and further comprising an offset stage that outputs an offset stage signal, the offset corrected signal having a first portion that represents a combination of the first portion of the residual signal, the first offset signal, and the offset stage signal, and an adjoining second portion that represents a combination of the second portion of the residual signal, the second offset signal, and the offset stage signal.

21. The stage of claim 17 and further comprising an offset stage that outputs an offset stage signal, the offset corrected signal having a first portion that represents a combination of the first portion of the residual signal, the first offset signal, and the offset stage signal, an adjoining second portion that represents a combination of the second portion of the residual signal, the second offset signal, and the offset stage signal, and a third portion that represents a combination of the third portion of the residual signal, the first offset signal and the offset stage signal.

22. A method for processing an image signal that has a first portion that corresponds with a first color and an adjoining second portion that corresponds with a second color, the method comprising the steps of:

removing a reset component from the image signal to leave a residual signal that has a first portion that corresponds with the first color and an adjoining second portion that corresponds with the second color, and outputting the residual signal;

converting a first offset value into a first offset signal that corresponds with the first color and a second offset value into a second offset signal that corresponds with the second color, and outputting the first and second offset signals;

forming an offset corrected signal that has a first portion that represents a combination of the first portion of the residual signal and the first offset value, and an adjoining second portion that represents a combination of the second portion of the residual signal and the second offset value; and

receiving a first gain value that corresponds with the first color and a second gain value that corresponds with the second color, and amplifying the first portion of the offset corrected signal with the first gain value and the second portion of the offset corrected signal with the second gain value.

23. The method of claim 22 wherein:

the input signal has a third portion that represents a third color;

the residual signal has a third portion that represents the third color;

a third offset value being converted into a third offset signal that corresponds with the third color;

the offset corrected signal has a third portion that represents a combination of the third portion of the residual signal and the third offset value;

a third gain value that corresponds with the third color is amplified the third portion of the offset corrected signal with the third gain value; and

the controller outputs the third offset value and the third gain value.