Navigation PDA and method with optimal antenna placement

• US 6,775,612 B1
• Filed: 04/09/2003
• Issued: 08/10/2004
• Est. Priority Date: 12/20/2001
• Status: Expired due to Term

• Current Assignee: Garmin Limited
• Original Assignee: Garmin Limited
• Inventors: Kao, Min H., Childs, Michael, Beesley, Darin J.
• Primary Examiner(s): Beaulieu, Yonel
• Application Number:
  US10/410,428
• Time in Patent Office: 489 Days
• Field of Search: 701/200, 701/208, 701/209, 701/211, 701/213, 701/214, 342/357.01, 342/357.06, 342/357.12, 342/357.13
• US Class Current: 701/209
• CPC Class Codes: G01C 21/3446 Details of route searching algorithms, e.g. Dijkstra, A*, arc-flags, using precalculated routes

Abstract

A GPS enabled personal digital assistant (PDA) is provided. A housing of the PDA includes a processor and a memory operably coupled to the processor. The memory has provided thereto cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations. A display is operably coupled to the processor, the display viewable at a front face of the housing. And, a GPS patch antenna is operably coupled to the processor and is located above the display within the housing to receive GPS signals.

Claims

1. A GPS enabled personal digital assistant (PDA), comprising:

within a housing of the PDA,

a processor;

a memory adapted to communicate with the processor, the memory having cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations;

wherein the plurality of types of thoroughfares are organized in a hierarchy of detail levels;

wherein the processor operates on a route calculation algorithm to determine a path to a selected one of the number of locations;

a display operably coupled to the processor, the display viewable at a front face of the housing; and

a GPS patch antenna operably coupled to the processor, and located above the display within the housing.

2. The PDA of claim 1, including a GPS receiver coupled to the processor and adapted to provide a determined position of the GPS enabled PDA, and wherein the path includes a path between the determined position and the selected one of the number of locations.

3. The PDA of claim 1, wherein the processor operates on a route calculation algorithm to find a path between any two of the number of locations, and wherein the route calculation algorithm forces switching between different levels in the hierarchy of detail levels based on a set of criteria provided to the memory.

4. The PDA of claim 3, wherein the set of criteria includes:

a number of jump segments requirement;

a distance requirement;

a minimum memory usage requirement;

a maximum memory usage requirement; and

an at least one jump segment requirement.

5. The PDA of claim 4, wherein the distance requirement includes a minimum distance requirement, the minimum distance requirement being at least 3 kilometers.

6. The PDA of claim 4, wherein the set of criteria are independently variable in order to tailor an aggressiveness with which the route calculation algorithm forces switching between different levels in the hierarchy of detail levels.

7. The PDA of claim 1, wherein the PDA includes a multifunction device capable of cellular communication.

8. A GPS enabled PDA, comprising:

within a housing of the PDA,

a processor;

a memory in communication with the processor, the memory having cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations;

wherein the plurality of types of thoroughfares are organized in a number of detail levels;

wherein the processor operates on a route calculation algorithm to determine a path to a selected one of the number of locations;

a display operably coupled to the processor, the display viewable at a front face of the housing;

an integrated GPS operably coupled to the processor and having an antenna located above the display within the housing; and

a cellular transceiver operably coupled to the processor and located within the housing.

9. The GPS enabled PDA of claim 8, wherein the plurality of types of thoroughfares are contained in a data structure organized in a hierarchy of detail layers.

10. The GPS enabled PDA of claim 9, wherein the processor operates on a route calculation algorithm and the hierarchy of detail layers to find a convergence between any two of the number of locations, and wherein the route calculation algorithm forces switching to another layer in the hierarchy of detail layers based on a set of criteria provided to the memory, the set of criteria including a maximum memory usage requirement and an at least one jump segment requirement.

11. The GPS enabled PDA of claim 10, wherein the maximum memory usage requirement for the lowest layer is no greater than 35% of available space on the memory.

12. The GPS enabled PDA of claim 10, wherein the set of criteria further includes:

a number of jump segments requirement;

a distance requirement; and

a minimum memory usage requirement.

13. The GPS enabled PDA of claim 12, wherein the minimum memory usage requirement at a greatest layer of detail in the hierarchy of detail layers is at least 2% of available space on the memory.

14. The GPS enabled PDA of claim 9, wherein the hierarchy of detail layers includes a hierarchy of ever-decreasing details such that a lowest layer includes the greatest amount of detail.

15. The GPS enabled PDA of claim 9, wherein the presence of a type of thoroughfare in any given layer of the hierarchy of detail layers is determined by a traversability of the thoroughfare.

16. A PDA navigation aid method, comprising:

providing a GPS enabled personal digital assistant (PDA), wherein a housing of the PDA includes;

a processor;

a memory adapted to communicate with the processor, the memory having cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations;

a display operably coupled to the processor, the display viewable at a front face of the housing;

integrating a GPS receiver having a GPS antenna in the housing with the processor, such that the GPS antenna is located above the display;

organizing the data indicative of the plurality of types of thoroughfares according to a hierarchy of detail layers, and

determining a path to a selected one of the number of locations with a route calculation algorithm.

17. The method of claim 16, wherein the method further includes;

organizing in the memory data indicative of thoroughfares of a plurality of types according to a hierarchy of detail layers, the thoroughfares of the plurality of types connecting a number of locations; and

using a route calculation algorithm to find a convergence between any two of the number of locations.

18. The method of claim 17, wherein organizing in memory data indicative of thoroughfares of a plurality of types according to a hierarchy of detail layers includes organizing the thoroughfares of a plurality of types by layers ever-decreasing detail such that a lowest layer includes the greatest amount of detail.

19. The method of claim 17, wherein using the route calculation algorithm includes forcing layer switching to another layer in the hierarchy of detail layers by assigning a set of criteria to the algorithm, the set of criteria including a maximum memory usage requirement and an at least one jump segment requirement.

20. The method of claim 19, wherein assigning a maximum memory usage requirement includes assigning a maximum memory usage requirement for the lowest layer equal to or less than 35% of available space on the memory.

21. The method of claim 19, wherein assigning a set of criteria to the algorithm includes assigning a set of criteria which further includes:

a number of jump segments requirement;

a distance requirement; and

a minimum memory usage requirement.

22. The method of claim 19, wherein the set of criteria are independently variable at each layer in the hierarchy of detail layers.

23. The method of claim 19, wherein assigning the minimum memory usage requirement at a greatest layer of detail in the hierarchy of detail layers is at least 2% of available space on the memory.

24. A PDA navigation aid method, comprising:

providing a GPS enabled personal digital assistant (PDA), wherein a housing of the PDA includes;

a processor;

a memory adapted to communicate with the processor, the memory having cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations;

a display operably coupled to the processor, the display viewable through the housing;

integrating a GPS receiver having a GPS antenna in the housing with the processor, such that the GPS antenna is located above the display;

integrating a cellular transceiver in the housing with the processor;

organizing the data indicative of the plurality of types of thoroughfares according to a hierarchy of detail layers; and

calculating a path between any two of the number of locations.

25. The method of claim 24, wherein the method further includes;

providing a data structure to the memory, the data structure indicative of thoroughfares of a plurality of types organized according to a hierarchy of detail layers and having node locations connecting the thoroughfares of the plurality of types;

beginning at a first node location, evaluating a number of adjacent nodes for a convergence between a first node location and a second node location;

for each evaluated adjacent nodes, evaluating a next adjacent node;

maintaining a list of nodes having a jump segment to a next layer in the hierarchy of detail layers and maintaining a running total of nodes explored from a given jump segment node; and

forcing a layer switch in the hierarchy of detail layers based on a set of criteria.

26. The method of claim 25, wherein forcing a layer switch in the hierarchy of detail layers based on a set of criteria includes forcing a layer switch when at least one jump segment has been found and a maximum memory allowance has been utilized for a given layer, the maximum memory allowance for each given layer being independently variable.

27. The method of claim 26, wherein the method further includes preventing a layer switch in the hierarchy of detail layers until a requisite number of jump segments have been found in combination with a requisite number in the running total of nodes explored from a given jump segment node, a minimum distance from the first node location has been explored, and a minimum memory space has been utilized for a given layer.

28. The method of claim 27, wherein, in the method, forcing a layer switch preempts preventing a layer switch.

29. The method of claim 27, wherein the requisite number of jump segments in combination with a requisite number in the running total of nodes explored from a given jump segment node, the minimum distance from the first node location that has been explored, and the minimum memory space utilization are all independently variable for each given layer.

30. The method of claim 29, wherein each given layer includes a number of alternatives for the requisite number of jump segments and requisite number in the running total of nodes explored from a given jump segment node combinations.

31. The method of claim 24, wherein the method further includes, simultaneous with evaluating a number of adjacent nodes beginning at a first node location, beginning at a second node location and evaluating a number of adjacent nodes thereto for a convergence between a first node location and the second node location.

32. The method of claim 31, wherein the method further includes selecting a solution from a number of convergences between the first node location and the second node location.

33. The method of claim 24, wherein the method further includes a server, operably coupled to the PDA via the cellular transceiver, to respond to a request from the PDA by performing calculations on the cartographic data and transmitting results to the PDA.

34. A method of manufacturing a combined GPS/PDA, comprising:

providing a portable, handheld housing;

locating within the housing a processor, a memory, and a display viewable at a front face of the housing, the memory and the processor operable to execute a GPS functionality and a PDA functionality, the memory operable to communicate with the processor, the memory having cartographic data including any number of locations and data indicative of thoroughfares of a plurality of types connecting certain ones of the locations;

locating within the housing a GPS receiver having a GPS antenna, such that the GPS antenna is located above the display;

organizing the data indicative of the plurality of types of thoroughfares according to a hierarchy of detail layers; and

calculating a path between any two of the number of locations by using a route calculation algorithm.

35. The method of claim 34, wherein the method further includes locating a wireless communication component within the housing.

36. The method of claim 34, wherein the method further includes locating an input that is accessible at a front face of the housing at a location below the display.