Electro-optical device and manufacturing method thereof

• US 6,777,255 B2
• Filed: 10/29/2002
• Issued: 08/17/2004
• Est. Priority Date: 03/19/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Vu, David
• Application Number:
  US10/282,689
• Publication Number:
  US 20030062499A1
• Time in Patent Office: 658 Days
• Field of Search: 438/29-30, 438/149-151, 438/153-154, 438/486, 438/491, 257/59, 257/71-72, 257/290-291, 257/365-366, 349/38-39, 349/122, 349/138
• US Class Current: 438/30
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01L 2029/7863 with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78624 the source and the drain regions being asymmetrical
• CPC Class Codes: H01L 29/78627 with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

An electro-optical device having high operation performance and reliability, and a manufacturing method thereof. A TFT structure which is strong agains hot carrier injection is realized by disposing a Lov region 207 in an n-channel TFT 203 which forms a driver circuit. Further, Loff regions 217 to 220 and offset region are disposed in an n-channel TFT 304 which forms a pixel section, and a TFT structure of low OFF current value is realized. Further, by reducing the n-type impurity element contained in Loff regions 217 to 220 to approximately 1×10¹⁶ to 5×10¹⁸ atoms/cm³, further reduction of OFF current can be performed.

Claims

1. A method for manufacturing an electro-optical device which comprises a pixel section and a driver circuit over a same substrate comprising:

process (A) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 2×

10¹⁶ to 5×

10¹⁹ atoms/cm³;

process (B) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 1×

10²⁰ to 1×

10²¹ atoms/cm³;

process (C) for forming a region which includes a p-type impurity element in an active layer of a p-channel TFT which forms the driver circuit in a concentration range of 3×

10²⁰ to 3×

10²¹ atoms/cm³;

process (D) for forming a region which includes an n-type impurity region in an active layer of a pixel TFT which forms the pixel section in a concentration range of 1×

1¹⁶ to 5×

10¹⁸ atoms/cm³, characterized in that the process D is performed by adding an n-type impurity element by using as a mask a gate wiring that is covered by an insulating film comprising silicon.

2. A method for manufacturing an electro-optical device according to claim 1 characterized in that a film thickness of the insulating film comprising silicon is between 25 and 100 nm.

3. A method for manufacturing an electro-optical device which comprises a pixel section and a driver circuit over a same substrate comprising:

process (A) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 2×

10¹⁶ to 5×

10¹⁹ atoms/cm³;

process (B) for forming a region which includes an n-type impurity element in an active layer of an n-channel TFT which forms the driver circuit in a concentration range of 1×

10²⁰ to 1×

10²¹ atoms/cm³;

process (C) for forming a region which includes a p-type impurity element in an active layer of a p-channel TFT which forms the driver circuit in a concentration range of 3×

10²⁰ to 3×

10²¹ atoms/cm³;

process (D) for forming a region which includes an n-type impurity region in an active layer of a pixel TFT which forms the pixel section in a concentration range of 1×

10¹⁶ to 5×

10¹⁸ atoms/cm³, characterized in that an n-type impurity region (c) and an offset region formed in contact with the n-type impurity region (c) are formed in the process (D).

4. A method for manufacturing an electro-optical device according to claim 3 characterized in that the offset region is formed by adding an n-type impurity element in an active layer of the pixel TFT by using as a mask a gate wiring covered by an insulating film comprising silicon.