Supercapacitor balancing method and system

• US 6,777,917 B2
• Filed: 06/17/2002
• Issued: 08/17/2004
• Est. Priority Date: 06/18/2001
• Status: Expired due to Fees

• Current Assignee: SAFT SA (Totalenergies Se)
• Original Assignee: Alcatel SA (Nokia Corporation)
• Inventors: Desprez, Philippe, Raël, Stéphane, Sharif, Fadi, Barrailh, Gérard, Lavaur, Pascal, Davat, Bernard
• Primary Examiner(s): Patel, Rajnikant B.
• Application Number:
  US10/171,970
• Publication Number:
  US 20030020435A1
• Time in Patent Office: 792 Days
• Field of Search: 320/167, 320/166, 320/132, 320/136, 320/104, 320/105, 320/118, 320/119, 320/122, 320/120, 320/117, 320/139
• US Class Current: 320/167
• CPC Class Codes: H02H 7/16 for capacitors for synchronous capacitors H02H7/06
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: Y02T 10/70 Energy storage systems for electromobility, e.g. batteries

Abstract

The present invention relates to a method of and a system for charging at least one supercapacitor that is particularly suitable for balancing supercapacitors. The method includes a step (22) of bypassing the current flowing in the supercapacitor so that, when the voltage (V) at the terminals of said supercapacitor reaches a threshold voltage (V_S), the bypass current (I_BP) assumes a maximum value, which method is characterized in that it includes a step (21) of monitoring of the charging current (I_C) of said supercapacitor as a function of the voltage (V) at the terminals of said supercapacitor by a voltage detector logic function (F₀) able to change from an activated state to a deactivated state when the voltage (V) at the terminals of said supercapacitor exceeds a first predefined voltage (V_OH) greater than the threshold voltage (V_S) and then to return to the activated state when said voltage (V) at the terminals of said supercapacitor falls below a second predefined voltage (V_OB) less than or equal to said first predefined voltage (V_OH).

Claims

1. A method of charging at least one supercapacitor comprising steps of:

bypassing the current flowing in said supercapacitor so that, when the voltage at the terminals of said supercapacitor reaches a predetermined value, constituting a threshold voltage, the bypass current assumes a maximum value constituting a nominal bypass current,

monitoring of a charging current of said supercapacitor as a function of the voltage at the terminals of said supercapacitor by a voltage detector logic function,

wherein said voltage detector logic function comprises an optimization function, capable of changing from an activated state to a deactivated state when the voltage at the terminals of said supercapacitor exceeds a first predefined voltage greater than the threshold voltage and then capable of returning to the activated state when said voltage at the terminals of said supercapacitor falls below a second predefined voltage less than or equal to said first predefined voltage.

2. The charging method according to claim 1, wherein said signal delivered by said optimization function is a hysteresis signal.

3. The charging method according to claim 1, further comprising a step of charging said supercapacitor with a charging current greater than said nominal bypass current and maintaining said charging step for as long as said optimization logic function is in the activated state.

4. The charging method according to claim 1, further comprising a step such that, when the voltage at the terminals of said supercapacitor returns to a voltage value, constituting a reference voltage, which is less than the value of said threshold voltage, the bypass current assumes a value very much less than a current corresponding to the leakage current of said supercapacitor.

5. The charging method according to claim 4, wherein the characteristic of the bypass current as a function of the voltage at the terminals at said supercapacitor is a hysteresis signal.

6. The charging method according to claim 1, further comprising a step of filtering high-frequency harmonics of said voltage at the terminals of said supercapacitor.

7. The charging method according to claim 1, further comprising a step of reinitializing of the charger as a function of the voltage at the terminals of the supercapacitor by a voltage detector logic function, constituting a reinitialization function, able to change from an activated state to a deactivated state when the voltage at the terminals of said supercapacitor exceeds a third predefined voltage less than or equal to said first predefined voltage and then to return to said activated state when said voltage at the terminals of said supercapacitor falls below a fourth predefined voltage less than said second predefined voltage.

8. The charging method according to claim 1, further comprising a step of detection of a minimum safety voltage at the terminals of the supercapacitor by a voltage detector logic function, constituting a minimum voltage detector function, able to change from an activated state to a deactivated state when the voltage at the terminals of said supercapacitor exceeds a fifth predefined voltage and to return to the activated state when said voltage at the terminals of said supercapacitor falls below a sixth predefined voltage.

9. The charging method according to claim 1, further comprising a step of charging a plurality of supercapacitors, wherein said optimization function changes from an activated state to a deactivated state when at least one of the voltages at the terminals of said supercapacitors exceeds said first predefined voltage and returns to the activated state when each of the voltages at the terminals of said supercapacitors falls below said second predefined voltage.

10. The charging method according to claim 7, wherein said reinitialization function changes from an activated state to a deactivated state when at least one of the voltages at the terminals of said supercapacitors exceeds said third predefined voltage and returns to the activated state when each of the voltages at the terminals of said supercapacitors falls below said fourth predefined voltage.

11. The charging method according to claim 9, wherein said minimum voltage detector function changes from an activated state to a deactivated state when each of the voltages at the terminals of said supercapacitors exceeds said fifth predefined voltage and returns to the activated state when at least one of the voltages at the terminals of said supercapacitors falls below said sixth predefined voltage.

12. The charging method according to claim 9, further comprising a step of detection of dispersion of the voltage at the terminals of said supercapacitors by a voltage detector logic function, constituting a dispersion detector function, wherein said dispersion detector function changes from an activated state to a deactivated state when each of the voltages (Vi) at the terminals of said supercapacitors exceeds a seventh predefined voltage and returns to the activated state when at least one of the voltages at the terminals of said supercapacitors falls below an eighth predefined voltage.

13. A system for implementing the method according to claim 1, comprising:

at least one supercapacitor,

a bypass circuit comprising a transistor operating in switching mode and connected in parallel with the terminals of said supercapacitor,

charging means, and

a detector unit delivering at least one logic signal representing the voltage at the terminals of said supercapacitor, said logic signal being supplied to said charging means.

14. The system according to claim 13, comprising a low-pass filter connected in parallel with the terminals of said supercapacitor.

15. The system according to claim 13, further comprising a plurality of supercapacitors connected in series, a bypass circuit being connected in parallel to the terminals of each of said supercapacitors.

16. The system according to claim 13, further comprising a plurality of supercapacitors connected in series, a single bypass circuit being connected in parallel to the terminals of all of said supercapacitors.

17. The system according to claim 13, further comprising a plurality of supercapacitors connected in parallel, a single bypass circuit being connected in parallel to the terminals of all of said supercapacitors.