Voltage regulator providing multiple output voltages

• US 6,777,918 B2
• Filed: 12/23/2002
• Issued: 08/17/2004
• Est. Priority Date: 12/23/2002
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Harrington, Peter B., Javanifard, Johnny
• Primary Examiner(s): Vu, Bao Q.
• Application Number:
  US10/328,845
• Publication Number:
  US 20040119446A1
• Time in Patent Office: 603 Days
• Field of Search: 323/222, 323/224, 323/282, 323/284
• US Class Current: 323/222
• CPC Class Codes: H02M 1/009 having two or more independently controlled outputs for DC-DC converter with intermediate AC H02M3/33561
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A system includes an inductive element, at least one switch, an output stage and a circuit. The switch(es) is coupled to the inductive element to generate switching cycles. The switch(es) energizes and de-energizes the inductive element to generate each switching cycle. The output stage provides an output voltage. The circuit couples the output stage to the inductive element in response to a first set of the switching cycles and decouples the output stage from the inductive element in response to a second set of the switching cycles. The first set of switching cycles do not overlap the second set of switching cycles in time.

Claims

1. A system comprising:

an inductive element;

at least one switch coupled to the inductive element to generate switching cycles, said at least one switch energizing and de-energizing the inductive element to generate each switching cycle;

an output stage to provide an output voltage; and

a circuit to couple the output stage to the inductive element in response to a first set of the switching cycles and decouple the output stage from the inductive element in response to a second set of the switching cycles, the first set of switching cycles not overlapping the second set of switching cycles in time.

2. The system of claim 1, wherein the first set of switching cycles is interleaved in time with the second set of switching cycles.

3. The system of claim 1, wherein the first set of switching cycles is associated with the output voltage and the second set of switching cycles is associated with another output voltage.

4. The system of claim 1, further comprising:

another output stage coupled to the inductive element to provide another output voltage.

5. The system of claim 4, wherein the first set of switching cycles is associated with said output voltage and the second set of switching cycles is associated with said another output voltage.

6. The system of claim 5, further comprising:

a controller to control duty cycles of the first set of switching cycles to regulate said output voltage and control duty cycles of the second set of switching cycles to regulate said another output voltage.

7. The system of claim 4, further comprising:

a controller to control duty cycles of the switching cycles to regulate said output voltage and said another output voltage.

8. The system of claim 1, wherein the inductive element comprises an inductor.

9. The system of claim 1, wherein the inductive element, said at least one switch, the output stage and the circuit form a Boost switching regulator.

10. A system comprising:

a processor to receive at least one of a first output voltage and a second output voltage to power at least part of the processor; and

a voltage regulator to;

provide the first output voltage at a first output terminal,

provide the second output voltage at a second output terminal,

energize and de-energize and a reactive element of the voltage regulator to generate switching cycles, and

couple the first output terminal to the reactive element in response to a first set of the switching cycles and decouple the first output terminal from the reactive element in response to a second set of the switching cycles, the first set of switching cycles not overlapping the second set of switching cycles in time.

11. The system of claim 10, wherein the first set of switching cycles is interleaved in time with the second set of switching cycles.

12. The system of claim 10, wherein the first set of switching cycles is associated with the first output voltage and the second set of switching cycles is associated with the second output voltage.

13. The system of claim 10, further comprising:

a controller to control the duty cycles of the switching cycles to regulate the first output voltage and the second output voltage.

14. The system of claim 10, further comprising:

a controller to control the duty cycles of the first set of switching cycles to regulate the first output voltage and control the duty cycles of the second set of switching cycles to regulate the second output voltage.

15. The system of claim 10, wherein the second output terminal is coupled to the inductive element in response to the first set of switching cycles and the second set of switching cycles.

16. The system of claim 10, wherein the voltage regulator comprises a Boost regulator.

17. A method comprising:

energizing and de-energizing a reactive element to generate a switching cycle;

repeating the energizing and de-energizing to generate multiple switching cycles;

coupling a first output terminal that provides a first output voltage to the reactive element in response to a first set of the multiple switching cycles; and

decoupling the first output terminal from the reactive element in response to a second set of the multiple switching cycles, the first set of switching cycles not overlapping the second set of switching cycles in time.

18. The method of claim 17, wherein the first set of switching cycles is interleaved in time with the second set of switching cycles.

19. The method of claim 17, wherein the first set of switching cycles is associated with the first output voltage and the second set of switching cycles is associated with a second output voltage.

20. The method of claim 17, further comprising:

controlling the duty cycles of the multiple switching cycles to regulate the first output voltage and a second output voltage.

21. The method of claim 17, further comprising:

controlling the duty cycles of the first set of multiple switching cycles to regulate the first output voltage; and

controlling the duty cycles of the second set of multiple switching cycles to regulate a second output voltage.

22. The method of claim 17, wherein the coupling the first output terminal comprises coupling a first output stage to the reactive element.

23. A system comprising:

a flash memory to receive at least one of a first output voltage and a second output voltage to power at least part of the flash memory; and

a voltage regulator to;

provide the first output voltage at a first output terminal,

provide the second output voltage at a second output terminal,

energize and de-energize an inductive element of the voltage regulator to generate switching cycles, and

couple the first output terminal to the inductive element in response to a first set of the switching cycles and decouple the first output terminal from the inductive element in response to a second set of the switching cycles, the first set of switching cycles not overlapping the second set of switching cycles in time.

24. The system of claim 23, further comprising:

a wireless interface coupled to the voltage regulator to receive at least one of the first output voltage and the second output voltage.

25. The system of claim 23, wherein the system comprises a cellular telephone.

26. The system of claim 23, wherein the system comprises a wireless communication interface.