Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
First Claim
1. A system comprising:
- a shared memory; and
a plurality of processing elements coupled to said shared memory, wherein at least one of said plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units, wherein said direct memory access controller comprises an address translation mechanism, wherein said plurality of attached processing units are configured to access said shared memory using said direct memory access controller.
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Accused Products
Abstract
A method and system for attached processing units accessing a shared memory in an SMP system. In one embodiment, a system comprises a shared memory. The system further comprises a plurality of processing elements coupled to the shared memory. Each of the plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units. Each direct memory access controller comprises an address translation mechanism thereby enabling each associated attached processing unit to access the shared memory in a restricted manner without an address translation mechanism. Each attached processing unit is configured to issue a request to an associated direct memory access controller to access the shared memory specifying a range of addresses to be accessed as virtual addresses. The associated direct memory access controller is configured to translate the range of virtual addresses into an associated range of physical addresses.
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Citations
14 Claims
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1. A system comprising:
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a shared memory; and
a plurality of processing elements coupled to said shared memory, wherein at least one of said plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units, wherein said direct memory access controller comprises an address translation mechanism, wherein said plurality of attached processing units are configured to access said shared memory using said direct memory access controller. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for attached processing units accessing a shared memory in a system comprising the steps of:
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issuing a request to an associated direct memory access controller to access said shared memory, by an attached processing unit element that does not contain an address translation mechanism, wherein said request specifies a range of addresses to be accessed as virtual addresses; and
translating said range of virtual addresses to be accessed to an associated range of physical addresses by said associated direct memory access controller. - View Dependent Claims (11, 12, 13, 14)
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Specification