Non-volatile solid state image pickup device and its drive

• US 6,781,178 B2
• Filed: 03/19/2002
• Issued: 08/24/2004
• Est. Priority Date: 03/22/2001
• Status: Expired due to Term

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Shizukuishi, Makoto
• Primary Examiner(s): Nguyen, Viet Q.
• Application Number:
  US10/100,069
• Publication Number:
  US 20020171102A1
• Time in Patent Office: 889 Days
• Field of Search: 257/296, 257/298, 348/294, 348/302, 365/110
• US Class Current: 257/296
• CPC Class Codes: H01L 27/14818 Optical shielding
• CPC Class Codes: H01L 27/14843 Interline transfer
• CPC Class Codes: H01L 27/14868 CCD or CID colour imagers
• CPC Class Codes: H04N 25/53 Control of the integration time
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

A solid state image pickup device is provided which performs a new form of image signal reading operation. The image pickup deice comprises a semiconductor substrate and a plurality of pixels that are formed on the semiconductor substrate, with each pixel having a photodetection element, which generates signal charges upon receiving incident light, a first MOS transistor structure, which has a first floating gate that is disposed above the semiconductor substrate and a first control gate that is capacitively coupled to the first floating gate, and a second MOS transistor structure, which has a second floating gate that is disposed above the semiconductor substrate and is electrically connected to the first floating gate and a second control gate that is capacitively coupled to the second floating gate.

Claims

1. A solid state image pickup device comprising:

a semiconductor substrate; and

a plurality of pixels that are formed on said semiconductor substrate, with each pixel having a photodetection element, which generates signal charges upon receiving incident light, and a non-volatile memory structure, which is connected to said photodetection element, takes in at least part of said signal charges, and can generate a signal voltage corresponding to the signal charges.

2. The solid state image pickup device as set forth in claim 1, wherein said non-volatile memory structure has:

a first MOS transistor structure equipped with a first floating gate, which is disposed above said semiconductor substrate; and

a first control gate, which is capacitively coupled to said first floating gate.

3. The solid state image pickup device as set forth in claim 2, wherein said non-volatile memory structure further has a second MOS transistor structure equipped with a second floating gate, which is disposed above said semiconductor substrate and is electrically connected to said first floating gate, and a second control gate, which is capacitively coupled to said second floating gate.

4. The solid state image pickup device as set forth in claim 3, further comprising:

a write control circuit, which is connected to said first MOS transistor structure and performs the control of injecting at least a part of said signal charges into said first floating gate; and

a read control circuit, which is connected to said second MOS transistor structure and performs the control of reading a threshold value.

5. The solid state image pickup device as set forth in claim 4, wherein said read control circuit contains a threshold value reading circuit, analog/digital conversion circuit, buffer memory, and shift register.

6. The solid state image pickup device as set forth in claim 5, wherein said threshold value read circuit applies a monotonically varying voltage to said second control gate.

7. The solid state image pickup device as set forth in claim 4, wherein said write control circuit performs charge injection into said first floating gate by channel hot electron injection or tunnel electron injection in said first MOS transistor structure.

8. The solid state image pickup device as set forth in claim 3, wherein the area across which said second control gate opposes said second floating gate is smaller than the area across which said first control gate opposes said first floating gate.

9. The solid state image pickup device as set forth in claim 3, wherein said first MOS transistor structure is either a stack type cell, split type cell, or ballistic injection type cell, and said second MOS transistor structure is a stack type cell.

10. The solid state image pickup device as set forth in claim 7, wherein said first MOS transistor structure is either a stack type cell, split type cell, or ballistic injection type cell, and said second MOS transistor structure is a stack type cell.

11. The solid state image pickup device as set forth in claim 1, wherein said photodetection element is a fully depleted type pn junction diode with an embedded charge accumulating part.

12. A solid state image pickup device, comprising:

a semiconductor substrate of a first conductivity type;

a well region formed in said semiconductor substrate and having a second conductivity type that is opposite to the first conductivity type;

a plurality of pn junction diodes, each of which has an embedded charge accumulation region of the first conductivity type formed within said well region;

a plurality of first MOS transistor structures, each of which is associated with one of said embedded charge accumulation regions as a first source region, and has a first floating gate that is formed above said semiconductor substrate, a first control gate that is capacitively coupled to said first floating gate, and a first drain region that is formed within said well region; and

second MOS transistor structures, each having a second source region and a second drain region, which are positioned in the vicinity of an associated one of said first MOS transistor structures and are formed within said well region, a second floating gate, which is formed above said semiconductor substrate and is electrically connected with said first floating gate, and a second control gate, which is capacitively coupled to said second floating gate.

13. A method of driving a solid state image pickup device comprising a semiconductor substrate of a first conductivity type, a well region formed in said semiconductor substrate and having a second conductivity type that is opposite to the first conductivity type, a plurality of pn junction diodes, each of which has an embedded charge accumulation region of the first conductivity type formed within said well region, a plurality of first MOS transistor structures, each of which is associated with one of said embedded charge accumulation regions as a first source region, and has a first floating gate that is formed above said semiconductor substrate, a first control gate that is capacitively coupled to said first floating gate, and a first drain region that is formed within said well region, and second MOS transistor structures, each having a second source region and a second drain region, which are positioned in the vicinity of an associate one of said first MOS transistor structures and are formed within said well region, a second floating gate, which is formed above said semiconductor substrate and is electrically connected with said first floating gate, and a second control gate, which is capacitively coupled to said second floating gate, said solid state image pickup device driving method comprising the steps of:

(a) letting light incident on said plurality of pn junction diodes and accumulating charges that express image information in said embedded charge accumulation regions,

(b) applying a write control voltage to said well regions and said first MOS transistor structures and injecting at least a part of said charges that express image information as signal charges into said first floating gate, and

(c) applying a control voltage to said second MOS transistor structures and detecting a threshold voltage.

14. The solid state image pickup device driving method as set forth in claim 13, furthermore comprising the step of:

(d) applying a control voltage to said well region and said first and second control gates and discharging the signal charges in said first and second floating gates into said well region.

15. The solid state image pickup device driving method as set forth in claim 14, furthermore comprising the step of:

(e) applying an inverse bias voltage and a forward bias voltage to said semiconductor substrate and said well region, respectively, to discharge the charges in said embedded charge accumulation region to said semiconductor substrate.