Apparatus for interfacing timing information in digital display device

• US 6,781,581 B1
• Filed: 04/05/2000
• Issued: 08/24/2004
• Est. Priority Date: 04/06/1999
• Status: Expired due to Fees

• Current Assignee: Edtech Company Limited
• Original Assignee: Edtech Company Limited
• Inventors: Lee, Ji Hyun
• Primary Examiner(s): Shalwala, Bipin
• Assistant Examiner(s): Dharia, Prabodh M.
• Application Number:
  US09/543,276
• Time in Patent Office: 1,602 Days
• Field of Search: 345/99, 345/523, 345/600, 345/634, 345/661, 345/698, 345/210-215, 707/500.1, 348/552, 348/511, 386/46
• US Class Current: 345/213
• CPC Class Codes: G09G 2370/04 Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
• CPC Class Codes: G09G 5/005 Adapting incoming signals to the display format of the display terminal
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/008 Clock recovery

Abstract

A timing information interfacing apparatus in a digital display device is provided to convert a timing information of a video signal generating unit to a timing information which is substantially requested by a display unit and transmit the converted timing information to the display unit. The timing information interfacing apparatus includes: an decoder for encoding a synchronous signal which is output from the video signal generating part and outputting a multiplexed synchronous signal in which a timing information data is carried; a decoder for decoding the multiplexed synchronous signal of the decoder to separate the synchronous signal and the information signal from the multiplexed synchronous signal and then outputting a demultiplexed timing information data carried in the synchronous signal; and a MICOM for controlling a sampling clock of a phase-locked loop and zoom up/down rates and horizontal/vertical positions of a display signal transforming part depending on the timing information data which is output from the decoder.

Claims

1. A video signal generating unit in communication with a display unit, wherein the video signal generating unit comprises:

a video signal generating part for generating at least one synchronous signal and timing information data; and

an encoder in communication with the video signal generating part for encoding the synchronous signal which is output from the video signal generating part and outputting a multiplexed synchronous signal in which the timing information data is multiplexed with the at least one synchronous signal; and

wherein the display unit comprises;

a decoder for decoding the multiplexed synchronous signal of the encoder to separate the at least one synchronous signal and the timing information data from the multiplexed synchronous signal and then outputting the timing information data; and

a controller responsive to the timing information data for controlling a sampling clock of a phase-locked loop and zoom up/down rates and horizontal/vertical positions of a display signal transforming part depending on the timing information data which is output from the decoder;

wherein, the video signal generating part generates the timing information data comprising information data about total clocks, number of total lines, an active area, and an active area start; and

wherein the information data of total clocks is carried in a horizontal synchronous signal, the information data of the number of total lines is carried in a vertical synchronous signal, the information data of the active area and the active area start are carried in the horizontal/vertical synchronous signals and the video signal generating unit generates accurate video timing to produce a smooth seamless flow of synchronized video.

2. The apparatus of claim 1, wherein the controller controls a sampling clock of the phase-locked loop using the information data of the number of total clocks.

3. The apparatus of claim 1, wherein the controller controls the zoom up/down rates and the horizontal/vertical positions of the display signal transforming part depending on at least one of the information of the number of total lines and the active area which is contained in the timing information data.

4. The apparatus of claim 1, wherein the timing information data is carried in the vertical synchronous signal which is generated in the video signal generating unit.

5. The apparatus of claim 1, wherein the timing information data is carried in a video signal which is generated in the video signal generating unit.

6. The apparatus of claim 1, wherein the timing information data is carried in a new line formed between the video signal generating unit and the display unit.

7. A video signal generating unit in communication with a display unit, wherein the video signal generating unit comprises:

a video signal generating part for generating at least one synchronous signal and timing information data;

an encoder communicating with the video signal generating part for encoding a video signal, the at least one synchronous signal, and a timing information data which are respectively output from the video signal generating part and outputting a multiplexed video and synchronous signal in which the timing information data is multiplexed therein; and

wherein the display unit comprises;

a decoder for decoding the multiplexed video and synchronous signal of the encoder to separate the at least one synchronous signal and the timing information data from the multiplexed video and synchronous signal and then outputting the timing information data carried in the original video signal and the original synchronous signal; and

a controller responsive to the timing information data for controlling a sampling clock of a phase-locked loop and zoom up/down rates and horizontal/vertical positions of a display signal transforming part depending on the timing information data which is output from the decoder;

wherein, the video signal generating part generates the timing information data comprising information data about total clocks, number of total lines, an active area, and an active area start; and

wherein the information data of total clocks is carried in a horizontal synchronous signal, the information data of the number of total lines is carried in a vertical synchronous signal, the information data of the active area and the active area start are carried in the horizontal/vertical synchronous signals and the video signal generating unit generates accurate video timing to produce a smooth seamless flow of synchronized video.

8. The apparatus of claim 7, further comprising:

a video signal processing part for transforming the video signal which is output from the video signal generating part into a transformed video signal with a predetermined level and outputting the transformed video signal having the predetermined level;

a synchronous signal processing part for performing polarity determination of horizontal/vertical synchronous signals and the separation of the horizontal/vertical synchronous signals and then outputting the resultant signals;

the phase-locked loop for generating the sampling clock corresponding to the horizontal synchronous signal which is separated through the synchronous signal processing part in response to the controller;

an analog/digital converting part for converting an analog video signal which is signal-processed in the video signal processing part to a corresponding digital video signal to the analog video signal depending on the sampling clock of the phase-locked loop.

9. The apparatus of claim 7, wherein the controller controls the sampling clock applied to the phase-locked loop using number of total clock and horizontal line which is contained in the timing information data and controls the zoom up/down rates and horizontal/vertical positions of the display signal transforming part depending on information of number of total vertical lines and a vertical period and an active area which is contained in the timing information data.

10. The apparatus of claim 8, wherein the controller controls the sampling clock applied to the phase-locked loop using number of total clock and horizontal line which is contained in the timing information data and controls the zoom up/down rates and horizontal/vertical positions of the display signal transforming part depending on information of number of total vertical lines and a vertical period and an active area which is contained in the timing information data.