Method and apparatus for reducing audio noise in a switching regulator

• US 6,784,646 B2
• Filed: 09/11/2003
• Issued: 08/31/2004
• Est. Priority Date: 08/08/2000
• Status: Expired due to Term

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Wong, Kent, Balakrishnan, Balu, Djenguerian, Alex B.
• Primary Examiner(s): Patel, Rajnikant B.
• Application Number:
  US10/659,911
• Publication Number:
  US 20040046533A1
• Time in Patent Office: 355 Days
• Field of Search: 323/277, 323/283, 323/131, 323/266, 323/267, 323/282, 323/273, 323/284, 363/56, 363/97, 363/132, 363/131, 363/21.09
• US Class Current: 323/277
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H02M 3/33515 with digital control
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A switching regulator utilizing on/off control that reduces audio noise at light loads by adjusting the current limit of the switching regulator. In one embodiment, a switching regulator includes a state machine that adjusts the current limit of the switching regulator based on a pattern of feedback signal values from the output of the power supply for a preceding N cycles of the drive signal. The state machine adjusts the current limit lower at light loads such that cycles are not skipped to reduce the operating frequency of the switching regulator into the audio frequency range until the flux density through the transformer is sufficiently low to reduce the generation of audio noise.

Claims

1. A circuit, comprising:

a power switch coupled between a first terminal and a second terminal, the first terminal to be coupled to an energy transfer element of a power supply and the second terminal to be coupled to a supply rail of the power supply;

a drive signal generator circuit coupled to a third terminal to receive an input signal, the drive signal generator to generate a drive signal coupled to control switching of the power switch in response to the input signal to regulate the output of the power supply; and

a current limit circuit coupled to the power switch and the drive signal generator circuit to control the drive signal to limit a current flow through the power switch, the current limit circuit including a state machine having a plurality of states and adapted to send signals to current limit adjustment circuitry included in the current limit circuit to adjust a plurality of current limit settings for the power switch in response to the input signal.

2. The circuit of claim 1 wherein the input signal is a feedback signal representative of an output of the power supply.

3. The circuit of claim 1 wherein the input signal is a feedback signal representative of an output voltage of the power supply.

4. The circuit of claim 1 wherein the input signal is a feedback signal representative of an output current of the power supply.

5. The circuit of claim 1 wherein the drive signal generator circuit is adapted to selectively disable each on period of the drive signal in response to the input signal to regulate the output of the power supply.

6. The circuit of claim 1 wherein the plurality of current limit settings to which the power switch is adjusted are selected in a first order by the state machine when transitioning from a low state to a super high state and wherein the plurality of current limit settings to which the power switch is adjusted are selected in a second order by the state machine when transitioning from the super high state to the low state.

7. The circuit of claim 6 wherein the second order in which the plurality of current limit settings are selected by the state machine is different than a reversal of the first order in which the plurality of current limit settings are selected by the state machine.