Rail to rail dual slope ADC

• US 6,784,823 B1
• Filed: 12/31/2003
• Issued: 08/31/2004
• Est. Priority Date: 12/31/2003
• Status: Active Grant

• Current Assignee: Winbond Electronics Corporation
• Original Assignee: Winbond Electronics Corporation
• Inventors: Koike, Hidcharu
• Primary Examiner(s): Tokar, Michael
• Assistant Examiner(s): Nguyen, Linh V.
• Application Number:
  US10/707,667
• Time in Patent Office: 244 Days
• Field of Search: 341/118, 341/128, 341/136, 341/155, 341/167
• US Class Current: 341/167
• CPC Class Codes: H03M 1/52 Input signal integrated with linear return to datum

Abstract

A rail to rail dual slope analog to digital converter (ADC) is provided in the present invention. The circuit scheme has an input stage, an integrator stage, and a comparator stage, where an operational amplifier (OPAMP) can be comprised of each stage respectively. The positive input of the integrator OPAMP coupling to an analog ground, and switching the negative feedback loop of the input stage between an input voltage, a reference voltage, and a short circuit, controlling a plurality of switches among circuit connections results in different phases of the dual slope ADC. A finer resolution is thus obtained according to rail to rail input voltage range. Also, the integrator OPAMP can be eliminated from the circuit of the present invention in order to reduce pins, with connecting an end of the external integrator capacitor to ground.

Claims

1. A dual slope analog to digital converter, comprising:

a first operational amplifier;

an integrator;

a comparator, whose positive input is coupled to the output of the integrator;

a resistor coupling the output of the first operational amplifier and the first input of the integrator; and

a first capacitor coupling the first input of the integrator and the negative input of the comparator,

wherein a plurality of couplings are controlled by a plurality of switches, comprising;

a first coupling, controlled by a first set of switches, for optionally forming a negative feedback loop for the first operational amplifier;

a second coupling, controlled by a second switch, for optionally forming connection between the negative input of the comparator and the positive terminal of the first operational amplifier, and

a third coupling, controlled by a third switch, optionally forming connection of feedback loop from the output of the comparator to the positive terminal of the first operational amplifier.

2. The dual slope analog to digital converter as recited in claim 1, wherein the integrator at least comprises:

a second operational amplifier, having a positive input terminal that is coupled to an analog ground voltage;

a second capacitor, being negatively feedback looped of the second operational amplifier.

3. The dual slope analog to digital converter as recited in claim 1, wherein the couplings are controlled for a plurality of phases, comprising:

an offset cancellation phase, wherein the first coupling is on, the second coupling is on, and the third coupling is on;

an integration phase, wherein the first coupling is on via a first capacitor supplying a first voltage across which, the second coupling is on, and the third coupling is off;

a discharge phase, wherein the first coupling is on via the first capacitor supplying a second voltage across which, the second coupling is on, and the third coupling is off; and

a charge reset phase, wherein the first coupling is on, the second coupling is off, and the third coupling is on.

4. The dual slope analog to digital converter as recited in claim 1, wherein the comparator comprises a third operational amplifier.

5. A dual slope analog to digital converter, comprising:

a first operational amplifier;

a comparator, whose positive input is coupled to an analog ground;

a first resistor, coupling a first pin an output of the first operational amplifier;

a first capacitor, coupling negative input of the comparator and the first pin and

a second capacitor, coupling the first pin and a ground, wherein a plurality of couplings are controlled by a plurality of switches, comprising;

a first coupling, controlled by a first set of switches, for optionally forming a negative feedback loop of the first operational amplifier,

a second coupling, controlled by a second switch, for optionally forming connection between positive input terminal of the first operational amplifier and negative input terminal of the comparator, and

a third coupling, controlled by a third switch, for optionally forming a negative feedback loop from the output of the comparator to the positive terminal of the first operational amplifier.

6. The dual slope analog to digital converter as recited in claim 5, wherein the comparator comprises a second operational amplifier.

7. The dual slope analog to digital converter as recited in claim 5, wherein the couplings are controlled for a plurality of phases, comprising:

an offset cancellation phase, wherein the first coupling is on, the second coupling is on, and the third coupling is on;

an integration phase, wherein the first coupling is on via a third capacitor supplying a first voltage across which, the second coupling is on, and the third coupling is off;

a discharge phase, wherein the first coupling is on via the third capacitor supplying a second voltage across which, the second coupling is on, and the third coupling is off; and

a charge reset phase, wherein the first coupling is on, the second coupling is off, and the third coupling is on.