Method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes, and systems for accomplishing same

• US 6,785,009 B1
• Filed: 02/28/2002
• Issued: 08/31/2004
• Est. Priority Date: 02/28/2002
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Stirton, James Broc, Lensing, Kevin R., Nariman, Hormuzdiar E., Reeves, Steven P.
• Primary Examiner(s): Font, Frank G.
• Assistant Examiner(s): Punnoose, Roy M.
• Application Number:
  US10/084,987
• Time in Patent Office: 915 Days
• Field of Search: 356/625, 356/630, 356/60, 356/601, 356/445, 356/448, 356/600, 430/30, 430/396, 438/14, 438/16
• US Class Current: 356/625
• CPC Class Codes: G01N 21/4788 Diffraction for sizing particles G01N15/0205
• CPC Class Codes: G01N 21/956 Inspecting patterns on the surface of objects contactless testing of electronic circuits G01R31/308; testing currency G07D; manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes and systems for accomplishing same is disclosed. In one embodiment, the method comprises providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, the target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of gate stacks, illuminating at least one grating structure formed above said substrate, measuring light reflected off of the grating structure formed above the substrate to generate an optical characteristic trace for the formed grating structure, and comparing the generated optical characteristic trace to the target trace.

Claims

1. A method, comprising:

providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic;

providing a substrate having at least one grating structure formed thereabove, said formed grating structure comprised of a plurality of gate stacks;

illuminating said at least one grating structure formed above said substrate;

measuring light reflected off of said at least one grating structure formed above said substrate to generate an optical characteristic trace for said formed grating structure; and

comparing said generated optical characteristic trace to said target trace.

2. The method of claim 1, wherein providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, comprises:

generating a plurality of optical characteristic traces for a plurality of grating structures comprised of a plurality of gate stacks;

generating electrical test data for at least one semiconductor device; and

correlating at least one of said plurality of optical characteristic traces with said electrical test data to determine a target optical characteristic trace that corresponds to a semiconductor device having at least one desired electrical performance characteristic.

3. The method of claim 1, further comprising adjusting at least one parameter of at least one process used to form gate stack on a subsequently processed wafer based upon said comparison of said generated trace and said target trace.

4. The method of claim 1, further comprising adjusting at least one parameter of at least one process operation to be performed on said provided substrate based upon a deviation between said generated trace and said target trace.

5. The method of claim 1, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a scribe line of said substrate.

6. The method of claim 1, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a production die formed above said substrate.

7. The method of claim 1, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having a plurality of grating structures formed thereabove.

8. The method of claim 1, wherein said grating structure formed above said provided substrate is formed in an area having dimensions of approximately 100×

120 μ

m.

9. The method of claim 1, wherein said at least one desired electrical performance characteristic comprises at least one of a drive current and an operating frequency.

10. A method, comprising:

providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic;

providing a silicon substrate having at least one grating structure formed thereabove, said formed grating structure comprised of a plurality of gate stacks;

illuminating said at least one grating structure formed above said substrate;

measuring light reflected off of said at least one grating structure formed above said substrate to generate an optical characteristic trace for said formed grating structure;

comparing said generated optical characteristic trace to said target trace; and

adjusting at least one parameter of at least one process used to form a gate stack on a subsequently processed wafer based upon said comparison of said generated trace and said target trace.

11. The method of claim 10, wherein providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, comprises:

generating a plurality of optical characteristic traces for a plurality of grating structures comprised of a plurality of gate stacks;

generating electrical test data for at least one semiconductor device; and

correlating at least one of said plurality of optical characteristic traces with said electrical test data to determine a target optical characteristic trace that corresponds to a semiconductor device having at least one desired electrical performance characteristic.

12. The method of claim 10, further comprising adjusting at least one parameter of at least one process operation to be performed on said provided substrate based upon a deviation between said generated trace and said target trace.

13. The method of claim 10, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a scribe line of said substrate.

14. The method of claim 10, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a production die formed above said substrate.

15. The method of claim 10, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having a plurality of grating structures formed thereabove.

16. The method of claim 10, wherein said grating structure formed above said provided substrate is formed in an area having dimensions of approximately 100×

120 μ

m.

17. The method of claim 10, wherein said at least one desired electrical performance characteristic comprises at least one of a drive current and an operating frequency.

18. A method, comprising:

providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic;

providing a silicon substrate having at least one grating structure formed thereabove, said formed grating structure comprised of a plurality of gate stacks;

illuminating said at least one grating structure formed above said substrate;

measuring light reflected off of said at least one grating structure formed above said substrate to generate an optical characteristic trace for said formed grating structure;

comparing said generated optical characteristic trace to said target trace; and

adjusting at least one parameter of at least one process operation to be performed on said provided substrate based upon a deviation between said generated trace and said target trace.

19. The method of claim 18, wherein providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, said target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, comprises:

generating a plurality of optical characteristic traces for a plurality of grating structures comprised of a plurality of gate stacks;

generating electrical test data for at least one semiconductor device; and

correlating at least one of said plurality of optical characteristic traces with said electrical test data to determine a target optical characteristic trace that corresponds to a semiconductor device having at least one desired electrical performance characteristic.

20. The method of claim 18, further comprising adjusting at least one parameter of at least one process used to form a gate stack on a subsequently processed wafer based upon said comparison of said generated trace and said target trace.

21. The method of claim 18, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a scribe line of said substrate.

22. The method of claim 18, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having at least one grating structure formed in a production die formed above said substrate.

23. The method of claim 18, wherein providing a substrate having at least one grating structure formed thereabove comprises providing a substrate having a plurality of grating structures formed thereabove.

24. The method of claim 18, wherein said grating structure formed above said provided substrate is formed in an area having dimensions of approximately 100×

120 μ

m.

25. The method of claim 18, wherein said at least one desired electrical performance characteristic comprises at least one of a drive current and an operating frequency.