Apparatus for data copyright management system
First Claim
1. A data copyright management apparatus comprising:
- a CPU bus connectable to a system bus of a user terminal;
a CPU connected to said CPU bus, decrypting with a first secret-key digital data encrypted by said first secret-key, and before handling storage, copy and transfer operations on decrypted digital data, encrypting with a second secret-key the decrypted digital data; and
an EEPROM connected to said CPU bus, storing said second secret-key.
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Accused Products
Abstract
A data copyright management apparatus is used with a user terminal and comprises a CPU, a CPU bus, ROM, EEPROM, and RAM. The CPU, ROM, EPROM, and RAM are connected to the CPU bus, and a system bus of a device which utilizes the data can be connected to the CPU bus. A data copyright management system program, crypt algorithm, and user information are stored in the ROM, and a second private-key, a permit key, a second secret-key, and copyright information are stored in the EEPROM. A first public-key, a first private-key, a second public-key, and a first secret-key are transmitted to the RAM during operation. The data copyright management apparatus may be configured in the form of a monolithic or hybrid IC, a thin IC card, PC card, and insertion board which have a unique terminal. If a copyright management program is supplied externally, it is stored in the EEPROM. Otherwise, it is stored in the ROM. In addition to a microprocessor of a user terminal which decrypts encrypted data for displaying and processing and re-encrypts the decrypted data for storing, copying, or transferring, at least one microprocessor, desirably two microprocessors, are added for decrypting and re-encrypting data which is encrypted and supplied. The microprocessors to be added may be connected to a system bus of the microprocessor of the user terminal. It is desirable that a multiprocessor configuration is implemented by using a SCSI bus, PCI bus, or SCI bus. Apparatus for decryption and re-encryption may be configured separately or as a unit. A device which is used to input and output encrypted data may be connected directly to the apparatus for decryption and re-encryption. The data copyright management apparatus may be implemented in the form of a monolithic IC, a hybrid IC, or a built-in subboard, and the apparatus in these forms may be incorporated in a computer, television set, set-top box, digital video tape recorder, digital video disk recorder, digital audio tape apparatus, or personal digital assistants, and the like.
111 Citations
36 Claims
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1. A data copyright management apparatus comprising:
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a CPU bus connectable to a system bus of a user terminal;
a CPU connected to said CPU bus, decrypting with a first secret-key digital data encrypted by said first secret-key, and before handling storage, copy and transfer operations on decrypted digital data, encrypting with a second secret-key the decrypted digital data; and
an EEPROM connected to said CPU bus, storing said second secret-key. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A data copyright management apparatus comprising:
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a CPU bus connectable to a system bus of a user terminal;
a CPU connected to said CPU bus, decrypting with a first secret-key digital data encrypted by said first secret-key, and before handling storage, copy, and transfer operations on decrypted digital data, encrypting with a second secret-key the decrypted digital data; and
a ROM connected to said CPU bus, storing a copyright management program. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A data copyright management apparatus comprising:
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a CPU bus connectable to a system bus of a user terminal;
a CPU connected to said CPU bus decrypted with a first secret-key digital data encrypted by said first secret-key, and before handling storage, copy, and transfer operations on decrypted digital data, encrypting with a second secret-key the decrypted digital data; and
a RAM connected to said CPU bus, storing a copyright management program. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A data copyright management apparatus comprising:
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a CPU bus connectable to a system bus of a user terminal;
a CPU connected to said CPU bus, decrypting with a first secret-key digital data encrypted by said first secret-key, before handling storage, copy and transfer operations on decrypted digital data, encrypting with a second secret-key the decrypted digital data, and decrypting with a third secret-key digital data which has been encrypted using said second secret-key and stored, copied, or transferred; and
an EEPROM connected to said CPU bus and storing said second secret-key. - View Dependent Claims (35, 36)
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Specification