Etch process that resists notching at electrode bottom
First Claim
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1. A process of forming a semiconductor device, comprising:
- forming at least one gate electrode layer over a gate oxide, the gate oxide being above a wafer surface;
providing a hardmask over a portion of the device layer;
using a plasma-etch of a first chemistry that includes one of HBr/Cl2, HBr/HCl, or HBr/Cl2/Cl4, and also includes a selelivity booster, and selectively etching into the device layer to form a pillar structure having at least one sidewall;
after using the first chemistry, using a plasma-etch of a different second chemistry that includes HBr and nitrogen and selectively etching into the device layer to form a pillar structure having at least one sidewall, the second chemistry including nitrogen in an amount less than about ten percent of gas flow of the second chemistry, wherein the amount of nitrogen is maintained to minimize notching in the pillar structure without affecting selectivity; and
terminating the use of a plasma-etch of the second chemistry in response to reaching the gate oxide.
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Abstract
A semiconductor device is manufactured using a small amount of nitrogen in the gate electrode etch process to minimize notching at the bottom of the electrode. Consistent with one embodiment of the present invention, the gate electrode etch process includes using a plasma-etch and selectively etching into the device layer to form the electrode with its lower sidewalls protected using a relatively small percentage of nitrogen in the plasma gas flow.
12 Citations
2 Claims
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1. A process of forming a semiconductor device, comprising:
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forming at least one gate electrode layer over a gate oxide, the gate oxide being above a wafer surface;
providing a hardmask over a portion of the device layer;
using a plasma-etch of a first chemistry that includes one of HBr/Cl2, HBr/HCl, or HBr/Cl2/Cl4, and also includes a selelivity booster, and selectively etching into the device layer to form a pillar structure having at least one sidewall;
after using the first chemistry, using a plasma-etch of a different second chemistry that includes HBr and nitrogen and selectively etching into the device layer to form a pillar structure having at least one sidewall, the second chemistry including nitrogen in an amount less than about ten percent of gas flow of the second chemistry, wherein the amount of nitrogen is maintained to minimize notching in the pillar structure without affecting selectivity; and
terminating the use of a plasma-etch of the second chemistry in response to reaching the gate oxide. - View Dependent Claims (2)
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Current AssigneeNXP B.V. (NXP Semiconductors NV)
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Original AssigneeKoninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
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InventorsGabriel, Calvin Todd, Zheng, Tammy
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Primary Examiner(s)CHEN, KIN CHAN
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Application NumberUS09/437,006Time in Patent Office1,778 DaysField of Search438/706, 438/710, 438/719, 438/720US Class Current438/706CPC Class CodesH01L 21/32137 of silicon-containing layers
