System and method for current handling in a digitally-controlled power converter

• US 6,795,009 B2
• Filed: 09/09/2002
• Issued: 09/21/2004
• Est. Priority Date: 09/09/2002
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Primarion Incorporated (Infineon Technologies AG)
• Inventors: Mori, Kevin, Trivedi, Malay, Duffy, Thomas P.
• Primary Examiner(s): Jeanglaude, Jean Bruner
• Application Number:
  US10/237,903
• Publication Number:
  US 20040046535A1
• Time in Patent Office: 743 Days
• Field of Search: 341/155, 327/538, 327/53, 323/283, 455/183.1, 455/574
• US Class Current: 341/155
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

Currents flowing in the various channels within a voltage regulator module (VRM) are suitably converted to digital equivalents that can be processed to control each module in a modular power supply. Functions that may be digitally implemented include current balancing between channels, current sharing between various modules in a power supply, and/or the like. By monitoring the current provided on each channel within a module, for example, a controller can determine an average current for the channels, which in turn can be used to identify and compensate for over- or under-production in any particular channel. Active voltage positioning techniques and overload protection may also be implemented using digital techniques.

Claims

1. A method of balancing current provided by a plurality of modules coupled to a common bus, the method comprising the steps of:

measuring a module current provided by one of said plurality of modules;

converting said module current to a digital representation;

transmitting said digital representation on said common bus;

receiving signals on said common bus, wherein said signals represent currents provided by other modules coupled to said common bus; and

adjusting the current provided by said module in response to said signals.

2. The method of claim 1 wherein said measuring step comprises measuring a plurality of channel currents, each of said plurality of channel currents corresponding to a channel of said module.

3. The method of claim 2 wherein said adjusting step comprises adjusting the channel currents provided by each of said channels.

4. The method of claim 1 further comprising the step of processing said signals to determine an average current for said plurality of modules.

5. The method of claim 4 further comprising the step of performing active voltage positioning as a function of said average current and said module current.

6. The method of claim 1 wherein said digital representation comprises a series of pulses on said shared bus.

7. The method of claim 6 wherein said digital representation is transmitted on said common bus such that the density of said pulses is indicative of said module current.

8. The method of claim 1 wherein said receiving step comprises counting said pulses on said shared bus to determine the total current supplied by said plurality of modules.

9. The method of claim 1 wherein said adjusting step comprises calculating an average current provided by said plurality of modules.

10. The method of claim 9 wherein said adjusting step further comprises performing adaptive voltage processing as a function of said average current and said module current.

11. A system for providing a balanced current to a load, the system comprising at least two modules communicating via a shared bus, wherein each of said at least two modules comprises:

an interface to said shared bus;

an analog-to-digital converter configured to detect the output current provided by said module and to provide a digital representation thereof; and

a controller configured to receive said digital representation, to transmit said digital representation via said interface, to receive data via said interface indicating a total current provided by said system, and to adjust the current provided by said module in response to said total current.

12. The system of claim 11 wherein said data comprises a stream of digital pulses having a density proportional to said total current provided by said system.

13. The system of claim 12 wherein said controller further comprises a counter configured to detect said stream of digital pulses via said interface.

14. The system of claim 13 wherein said counter is an edge. triggered counter.

15. The system of claim 11 wherein said controller is further configured to provide adaptive voltage processing as a function of said digital representation and of said total current.

16. A voltage regulator module (VRM) providing an electrical output to a load, the VRM comprising:

at least two channels, each of said channels having an electrical source switchably coupled to said electrical output;

an analog-to-digital converter associated with each of said at least two current-providing channels, said analog-to-digital converter configured to provide a digital representation of the current provided by each of said at least two channels; and

a controller configured to determine a desired output level as a function of said digital representation and of information received via a current sharing bus, wherein said controller is further configured to provide a control signal to each of said channels to adjust said electrical output to said desired output level.

17. The VRM of claim 16 wherein each of said at least two channels comprises a switch electrically coupled to said controller and receiving said control signal from said controller.

18. The VRM of claim 17 wherein said switch is a MOSFET.

19. The VRM of claim 16 wherein said controller is further configured to compute an average channel output for said at least two channels and to adjust the outputs of said at least two channels in response to said average channel output.

20. The VRM of claim 16 wherein said information comprises a digital indication of a total current provided to said load.

21. The VRM of claim 20 wherein said digital indication comprises a stream of digital pulses.

22. The VRM of claim 21 wherein a density of said pulses is proportional to said total current.

23. The VRM of claim 20 wherein said processor is further configured to provide adaptive voltage processing as a function of said digital representation and of said total current.

24. The VRM of claim 23 wherein said adaptive voltage processing is accomplished by providing a calculated offset to a voltage error signal by an amount proportional to said total current.

25. The VRM of claim 24 wherein analog-to-digital converter is configured to provide a digital representation of the voltage sensed across the output load to obtain said voltage error signal.

26. A method for controlling a plurality of channel currents provided by a voltage regulator module, the method comprising the steps of:

sampling each of the channel currents to produce a digital representation of each channel current;

determining an average channel current as a function of the digital representations;

comparing each of the digital representations to the average channel current to determine a channel deviation for each channel; and

adjusting the channel currents to compensate for the channel deviations.

27. The method of claim 26 wherein the adjusting step comprises varying a duty cycle on a control signal associated with the channel current.

28. The method of claim 26 further comprising the step of disabling the channel current if the channel current exceeds a threshold current.

29. The method of claim 26 wherein the adjusting step further comprises adjusting each channel current as a function of an average module current.

30. The method of claim 29 further comprising the step of providing a digital signal on a shared bus as a function of the channel currents.

31. The method of claim 30 further comprising the step of monitoring the shared bus to receive digital signals from other voltage regulator modules to determine a system current.

32. The method of claim 31 wherein the adjusting step further comprises adjusting the channel currents as a function of the system current.