Modular MFP/printer architectures

• US 6,795,887 B1
• Filed: 03/05/2001
• Issued: 09/21/2004
• Est. Priority Date: 03/05/2001
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Cervantes, Jose L.
• Primary Examiner(s): VO, TIM T
• Application Number:
  US09/800,012
• Time in Patent Office: 1,296 Days
• Field of Search: 710/72, 710/316, 710/317, 358/468, 358/474, 358/475, 358/476
• US Class Current: 710/316
• CPC Class Codes: H04N 1/0083 Arrangements for transferring signals between different components of the apparatus, e.g. arrangements of signal lines or cables for control or supervision between image input and output device H04N1/32
• CPC Class Codes: H04N 1/32561 using a programmed control device, e.g. a microprocessor
• CPC Class Codes: H04N 2201/0094 Multifunctional device, i.e. a device capable of all of reading, reproducing, copying, facsimile transception, file transception

Abstract

Modularized intra-system architectures for printer and multifunction peripheral (MFP) devices are based on disintegrating traditionally highly integrated systems into separate system components which incorporate immerging packet-switched interconnect technologies, such as the open standard RapidIO™. An MFP device has an internal modular architecture which includes each of the main systems integrated onto separate ASIC chips. The systems are interconnected through a switch fabric which routes packet-based data between the systems based on destination addresses embedded in the packets. The packet-based data is routed between the switch fabric and each of the systems through switch IO buses which provide a dedicated, point-to-point connection between the switch fabric and each system. The modular MFP/printer architectures using packet-switched interconnect technology have lower transaction latency, higher bandwidth, and fewer pins per system than is possible using traditional shared multi-drop bus architectures, and achieve data transfer rates in the gigabyte per second range.

Claims

1. A multifunction peripheral device comprising:

a printer system;

a scanner system;

an input/output (IO) system;

a processor system; and

,

a switch fabric for routing packet-based data between the printer systems the scanner system, the IO system, and the processor system trough switch IO buses, the switch IO buses providing a point-to-point dedicated interconnection between the switch fabric and each of the printer system, the scanner system, the IO system, and the processor system.

2. A multifunction peripheral device as recited in claim 1, wherein each system is integrated onto a distinct application specific integrated circuit (ASIC).

3. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the printer system and the scanner system which permits the transfer of packet-based data directly between the printer system and the scanner system.

4. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the printer system and the IO system which permits the transfer of packet-based data directly between the printer system and the IO system.

5. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the printer system and the processor system which permits the transfer of packet-based data directly between the printer system and the processor system.

6. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the scanner system and the IO system which permits the transfer of packet-based data directly between the scanner system and the IO system.

7. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the scanner system and the processor system which permits the transfer of packet-based data directly between the scanner system and the processor system.

8. A multifunction peripheral device as recited in claim 1, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the processor system and the IO system which permits the transfer of packet-based data directly between the processor system and the IO system.

9. A multifunction peripheral device as recited in claim 1, further comprising:

one or more enhanced IO ports; and

,

a switch IO to PCI bridge which couples the switch fabric to the one or more enhanced IO ports through a switch IO bus providing a point-to-point dedicated interconnection between the switch fabric and the bridge, and through a PCI bus providing an interconnection between the bridge and each one of the one or more enhanced IO ports.

10. A multifunction peripheral device as recited in claim 1, further comprising:

one or more enhanced IO ports; and

,

a second switch fabric for routing packet-based data between the one or more enhanced IO ports and the switch fabric through switch IO buses, the switch IO buses providing point-to-point dedicated interconnections between each of the one or more enhanced IO ports and the second switch fabric, and between the second switch fabric and the switch fabric.

11. A printer comprising:

a printer system;

an IO system;

a processor system; and

,

a switch fabric for routing packet-based data between the printer system, the IO system, and the processor system through switch IO buses, the switch IO buses providing a point-to-point dedicated interconnection between the switch fabric and each of the printer system, the IO system, and the processor system.

12. A printer as recited in claim 11, wherein each system is integrated onto a distinct ASIC.

13. A printer as recited in claim 11, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the printer system and the IO system which permits the transfer of packet-based data directly between the printer system and the IO system.

14. A printer as recited in claim 11, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the printer system and the processor system which permits the transfer of packet-based data directly between the printer system and the processor system.

15. A printer as recited in claim 11, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the processor system and the IO system which permits the transfer of packet-based data directly between the processor system and the IO system.

16. A printer as recited in claim 11, further comprising:

one or more enhanced IO ports; and

,

a switch IO to PCI bridge which couples the one or more enhanced IO ports to the switch fabric, each of the one or more enhanced IO ports coupled to the bridge through a PCI bus, and the bridge coupled to the switch fabric through a point-to-point dedicated switch IO bus.

17. A printer as recited in claim 11, further comprising:

one or more enhanced IO ports; and

,

a second switch fabric for routing packet-based data between the one or more enhanced IO ports and the switch fabric through switch IO buses, the switch IO buses providing point-to-point dedicated interconnections between each of the one or more enhanced IO ports and the second switch fabric, and between the second switch fabric and the switch fabric.

18. A multifunction peripheral device comprising:

a processor system integrated onto a processor ASIC;

an IO system integrated onto an IO ASIC;

two or more functional systems, each functional system for performing a peripheral function of the multifunction peripheral device, and each functional system integrated onto a distinct ASIC; and

,

a switch fabric for routing packet-based data between the processor system, the IO system, and each of the functional systems through switch IO buses, the switch IO buses providing point-to-point dedicated interconnection between the switch fabric and the processor system, the switch fabric and the IO system, and the switch fabric and each of the functional systems.

19. A multifunction peripheral device as recited in claim 18, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the processor system and the IO system which permits the transfer of packet-based data directly between the processor system and the IO system.

20. A multifunction peripheral device as recited in claim 18, further comprising a switch IO bus between each of the one or more functional systems providing a point-to-point dedicated interconnection for transferring packet-based data directly between each of the one or more functional systems.

21. A multifunction peripheral device as recited in claim 18, further comprising a switch IO bus between each of the one or more functional systems and the processor system providing a point-to-point dedicated interconnection for transferring packet-based data directly between each of the one or more functional systems and the processor system.

22. A multifunction peripheral device as recited in claim 18, further comprising a switch IO bus between each of the one or more functional systems and the IO system providing a point-to-point dedicated interconnection for transferring packet-based data directly between each of the one or more functional systems and the IO system.

23. A multifunction peripheral device as recited in claim 18, further comprising:

one or more enhanced IO ports; and

,

a switch IO to PCI bridge which couples the one or more enhanced IO ports to the switch fabric, each of the one or more enhanced IO ports coupled to the bridge through a PCI bus, and the bridge coupled to the switch fabric through a point-to-point dedicated switch IO bus.

24. A multifunction peripheral device as recited in claim 18, further comprising:

one or more enhanced IO ports; and

,

a second switch fabric for routing packet-based data between the one or more enhanced IO ports and the switch fabric through switch IO buses, the switch IO buses providing point-to-point dedicated interconnections between each of the one or more enhanced IO ports and the second switch fabric, and between the second switch fabric and the switch fabric.

25. A peripheral device comprising:

a processor system integrated onto a processor ASIC;

an IO system integrated onto an IO ASIC;

a peripheral system integrated onto a distinct peripheral ASIC for performing a peripheral function of the peripheral device; and

,

a switch fabric for routing packet-based data between the processor system, the IO system, and the peripheral system through switch IO buses, the switch IO buses providing point-to-point dedicated interconnection between the switch fabric and the processor system, the switch fabric and the IO system, and the switch fabric and the peripheral system.

26. A peripheral device as recited in claim 25, further comprising a switch IO bus providing a point-to-point dedicated interconnection between the processor system and the IO system which permits the transfer of packet-based data directly between the processor system and the IO system.

27. A peripheral device as recited in claim 25, further comprising a switch IO bus between the peripheral system and the processor system providing a point-to-point dedicated interconnection for transferring packet-based data directly between the peripheral system and the processor system.

28. A peripheral device as recited in claim 25, further comprising a switch IO bus between the peripheral system and the IO system providing a point-to-point dedicated interconnection for transferring packet-based data directly between the peripheral system and the IO system.

29. A peripheral device as recited in claim 25, further comprising:

one or more enhanced IO ports; and

,

a switch IO to PCI bridge which couples the one or more enhanced IO ports to the switch fabric, each of the one or more enhanced IO ports coupled to the bridge through a PCI bus, and the bridge coupled to the switch fabric through a point-to-point dedicated switch IO bus.

30. A method for transferring packet-based data within the intra-system architecture of a multifunction peripheral device comprising:

transmitting a request packet to a switch fabric from a processor system over a first dedicated switch IO bus;

forwarding the request packet to a printer system over a second dedicated switch IO bus;

generating a response packet at the printer system;

transmitting the response packet to the switch fabric from the printer system over the second dedicated switch IO bus; and

,

forwarding the response packet to the processor system over the first dedicated switch IO bus.

31. A method as recited in claim 30, further comprising:

acknowledging receipt of any packet by the switch fabric and by any system.

32. A method as recited in claim 30, wherein the request packet is a first request packet and the response packet is a first response packet, the method further comprising:

transmitting a second request packet to the switch fabric from a scanner system over a third dedicated switch IO bus;

forwarding the second request packet to an IO system over a fourth dedicated switch IO bus;

generating a second response packet at the IO system;

transmitting the second response packet to the switch fabric from the IO system over the fourth dedicated switch IO bus; and

,

forwarding the second response packet to the scanner system over the third dedicated switch IO bus.

33. A method as recited in claim 32, wherein the transmitting and forwarding of the first request packet and the first response packet happens concurrently with the transmitting and forwarding of the second request packet and the second response packet.