Power state resynchronization
First Claim
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1. A method of managing power in a computing system comprising:
- periodically determining a current hardware power state of an integrated circuit;
periodically comparing the current hardware power state to a software power state maintained by power management software, the software state representing an assumed power state of the integrated circuit; and
resynchronizing at least one of the hardware power state and the software power state if a discrepancy exists between the hardware power state and the software power state.
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Abstract
A computer system has multiple performance states. The computer system periodically determines if the software power state maintained by power management software that represents the power state of the processor or other computer system component matches the actual power state of the processor or other computer system component. If not, the actual power state and the software power state are resynchronized, for example, by reinitializing the power management software or otherwise causing the software power state to match the hardware power state.
87 Citations
19 Claims
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1. A method of managing power in a computing system comprising:
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periodically determining a current hardware power state of an integrated circuit;
periodically comparing the current hardware power state to a software power state maintained by power management software, the software state representing an assumed power state of the integrated circuit; and
resynchronizing at least one of the hardware power state and the software power state if a discrepancy exists between the hardware power state and the software power state. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A computer system comprising:
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an integrated circuit;
a first instruction sequence operable on the integrated circuit to periodically determine a current hardware power state of the integrated circuit;
a second instruction sequence operable on the integrated circuit to periodically compare the current hardware power state to a software maintained power state, the software maintained power state indicating a power state assumed by power management software, the second instruction sequence operable to generate an indication of the comparison; and
a third instruction sequence operable on the integrated circuit to resynchronize at least one of the hardware power state and the software maintained power state if a discrepancy exists between the hardware power state and the software maintained power state. - View Dependent Claims (8, 9, 10)
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11. A computer program product encoded in at least one computer readable medium to implement power management, the computer program product operable to:
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periodically determine an actual performance state of an integrated circuit;
periodically compare the actual performance state to a software maintained performance state and generate an indication of the comparison; and
resynchronize the actual performance state and the software maintained performance state if the indication indicates that a discrepancy exists between the actual performance state and the software maintained performance state. - View Dependent Claims (12, 13, 14, 15)
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16. A computing system comprising:
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an integrated circuit having multiple operational performance states;
means for periodically determining an actual performance state of the integrated circuit;
means for periodically comparing the actual performance state to a power management software performance state representing an assumed performance state and for generating an indication of the comparison; and
means for resynchronizing the actual performance state and the power management software performance state if the indication indicates that a discrepancy exists between the actual performance state and the power management software performance state. - View Dependent Claims (17, 18, 19)
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Specification