Single package multi-chip RF power amplifier

• US 6,798,295 B2
• Filed: 12/13/2002
• Issued: 09/28/2004
• Est. Priority Date: 12/13/2002
• Status: Expired due to Term

• Current Assignee: MACOM Technology Solutions Holdings, Inc.
• Original Assignee: CREE Microwave, LLC (Wolfspeed, Inc.)
• Inventors: Wood, Simon Maurice, Quinn, John Phillip, Pengelly, Raymond Sydney
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US10/318,849
• Publication Number:
  US 20040113697A1
• Time in Patent Office: 655 Days
• Field of Search: 330/124.R, 330/295, 330/302, 330/307
• US Class Current: 330/295
• CPC Class Codes: H01L 2223/6644 Packaging aspects of high-frequency amplifiers
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/10329 Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13063 Metal-Semiconductor Field-Effect Transistor [MESFET]
• CPC Class Codes: H01L 2924/13064 : High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/30111 : matching
• CPC Class Codes: H03F 3/602 : Combinations of several amplifiers

Abstract

Disclosed are a multi-chip power amplifier comprising a plurality chips with each chip being a transistor amplifier, and a housing in which all of the semiconductor chips are mounted. A plurality of input leads extend into the housing and a plurality of output leads extend from the housing. A plurality of first matching networks couple a semiconductor chip to an input lead and a plurality of second matching networks couple each semiconductor chip to an output lead whereby each chip has its own input lead and output lead. By providing all amplifier chips within a single housing with matching networks within the housing coupling the chips to the input and output leads, manufacturing cost is reduced and the overall package footprint on a mounting substrate is reduced. Further, the close proximity of the chips within the housing reduces phase differences among signals in the semiconductor chips.

Claims

1. A multi-chip power amplifier comprising:

a) a housing having a plurality of input leads and a plurality of output leads,

b) a plurality of semiconductor chips mounted in the housing, each chip comprising a transistor amplifier,

c) a plurality of first matching networks with each matching network being in the housing and coupling a semiconductor chip to an input lead, and

d) a plurality of second matching networks with each network being in the housing and coupling a semiconductor chip to an output lead whereby each chip has its own input lead and output lead.

2. The multi-chip power amplifier as defined by claim 1 wherein each chip comprises a field effect transistor having source, drain, and gate elements, a first matching network coupling a gate element to an input lead and a second matching network coupling a drain element to an output lead.

3. The multi-chip power amplifier as defined by claim 2 wherein the field effect transistor is a silicon LDMOSFET.

4. The multi-chip power amplifier as defined by claim 2 wherein the field effect transistor comprises a MESFET.

5. The multi-chip power amplifier as defined by claim 1 wherein each chip comprises:

a bipolar transistor having collector, base, and emitter elements, a first matching network coupling a base element to an input lead and a second matching network coupling a collector element to an output lead.

6. The multi-chip power amplifier as defined by claim 5 wherein the bipolar transistor comprises a silicon bipolar transistor.

7. The multi-chip power amplifier as defined by claim 5 wherein the bipolar transistor comprises a III-V heterojunction bipolar transistor.

8. The multi-chip power amplifier as defined by claim 5 wherein the bipolar transistor comprises a HEMT.

9. The multi-chip power amplifier as defined by claim 1 wherein the power amplifier is a Doherty amplifier wherein one chip provides a carrier amplifier and at least one chip provides a peak amplifier.

10. The multi-chip power amplifier as defined by claim 9 wherein a plurality of chips provide peak amplifiers with each peak amplifier being biased to sequentially activate in amplifying an input signal depending on input signal amplitude.

11. An amplifier circuit comprising:

a) a signal splitter for splitting an input signal into N signals,

b) a housing including N transistor amplifier chips mounted therein with N-input leads and N-output leads,

c) input coupling means coupling the N signals to the N-input leads,

d) input matching networks within the housing coupling each of the N-input leads to one of the N transistor amplifier chips, and

e) N-output matching networks within the housing coupling each of the N-output leads to one of the N transistor amplifier chips.

12. The amplifier circuit as defined by claim 11 wherein each chip comprises a field effect transistor having source, drain, and gate elements, a first matching network coupling a gate element to an input lead and a second matching network coupling a drain element to an output lead.

13. The amplifier circuit as defined by claim 12 wherein the field effect transistor is a silicon LDMOSFET.

14. The amplifier circuit as defined by claim 12 wherein field effect transistor comprises a MESFET.

15. The amplifier circuit as defined by claim 11 wherein each chip comprises a bipolar transistor having collector, base, and emitter elements, a first matching network coupling a base element to an input lead and a second matching network coupling a collector element to an output lead.

16. The amplifier circuit as defined by claim 15 wherein the bipolar transistor comprises a silicon bipolar transistor.

17. The amplifier circuit as defined by claim 15 wherein the bipolar transistor comprises a III-V heterojunction bipolar transistor.

18. The amplifier circuit as defined by claim 15 wherein the bipolar transistor comprises a HEMT.

19. The amplifier circuit as defined by claim 11 wherein the power amplifier is a Doherty amplifier with one chip providing a carrier amplifier and at least one chip providing a peak amplifier.

20. The amplifier circuit as defined by claim 19 wherein a plurality of chips provide peak amplifiers with the peak amplifiers being biased to sequentially activate in amplifying an input signal depending on input signal amplitude.