Calibration of a loss of signal detection system

• US 6,799,131 B1
• Filed: 09/07/2001
• Issued: 09/28/2004
• Est. Priority Date: 07/03/2001
• Status: Expired due to Fees

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Perrott, Michael H., Steiner, Philip David
• Primary Examiner(s): WACHSMAN, HAL D
• Application Number:
  US09/949,493
• Time in Patent Office: 1,117 Days
• Field of Search: 702/107, 702/117, 702/66, 702/69, 702/70, 702/71, 702/79, 702/78, 702/85, 702/124, 702/126, 702/189, 702/193, 702/198, 702/FOR.103, 702/FOR.104, 702/FOR.109, 702/FOR.110, 702/FOR.134, 702/FOR.156, 702/FOR.170, 702/FOR.171, 341/144, 341/118, 341/120, 341/155, 341/122, 341/164, 327/97, 327/100, 327/20, 327/24, 327/156, 326/21, 326/31, 326/34, 324/601, 324/76.15, 324/76.24, 324/76.42, 324/76.58
• US Class Current: 702/107
• CPC Class Codes: H03K 5/19 Monitoring patterns of pulse trains indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02

Abstract

An integrated circuit has a loss of signal (LOS) system for detecting a loss of signal condition for an input data stream according to a LOS threshold. The LOS threshold specifies a minimum signal magnitude indicating the loss of signal condition. The integrated circuit includes a sampling circuit to sample a LOS signal, which receives a sampling threshold specifying a signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value. A digital control circuit coupled to an output of the sampling circuit generates a calibrated digital representation of the sampling threshold according to a plurality of samples of the LOS signal. The calibrated sampling threshold is then used during loss of signal evaluation.

Claims

1. A method for calibrating a loss-of-signal (LOS) system used in an integrated circuit to determine existence of a loss-of-signal condition according to a loss-of-signal (LOS) threshold value, the LOS threshold value specifying a minimum signal magnitude for received data, the method comprising:

sampling a signal indicative of the LOS threshold value in a sampling circuit and providing a plurality of samples thereof; and

determining, according to the samples, a calibrated digital representation of a sampling threshold for the sampling circuit, the sampling threshold specifying a signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value.

2. The method as recited in claim 1 wherein determining the calibrated digital representation includes generating a plurality of digital representations of the sampling threshold in response to respective ones of the samples.

3. The method as recited in claim 2 wherein determining the calibrated digital representation of the sampling threshold includes determining an average of the plurality of the digital representations.

4. The method as recited in claim 2 wherein determining the calibrated digital representation of the sampling threshold includes determining an arithmetic mode of the digital representations.

5. The method as recited in claim 2 wherein the calibrated digital representation is an average of a plurality of calibrated digital representations over a plurality of calibration cycles, each of the calibration cycles being run prior to a respective determination of a loss of signal condition.

6. The method as recited in claim 5 wherein the average is a moving average.

7. The method as recited in claim 1 wherein the sampling circuit is coupled to receive an analog signal as the signal indicative of the LOS threshold value.

8. The method as recited in claim 1 further comprising converting the calibrated digital representation to an analog signal and supplying the analog signal to the sampling circuit as the sampling threshold.

9. The method as recited in claim 1 wherein determining the calibrated digital representation of the sampling threshold comprises:

counting an up/down counter in a direction determined according to the digital value of each of the samples; and

using at least a portion of an output of the up/down counter to control the sampling threshold level during calibration.

10. The method as recited in claim 9 further comprising supplying the output of the sampling circuit to the up/down counter through a down sampling circuit.

11. The method as recited in claim 9 wherein determining the calibrated digital representation of the sampling threshold includes determining an average of a plurality of values of at least a portion of the output of the up/down counter.

12. The method as recited in claim 11 wherein determining the average further comprises:

averaging a plurality of samples of a most significant portion of the output of the up/down counter to generate a first average; and

supplying the first average to a first digital to analog converter (DAC) during calibration of a second digital to analog converter (DAC), the first and second DACs supplying the sampling threshold to the sampling circuit.

13. The method as recited in claim 12 further comprising averaging a plurality of samples of a least significant portion of the output of the up/down counter to generate a second average and supplying the second average to the second DAC.

14. The method as recited in claim 1 wherein the sampling circuit comprises a register circuit, the register circuit including an amplifier and wherein determining the calibrated digital representation of the sampling threshold includes adjusting the sampling threshold of the register circuit by adjusting an offset to the amplifier.

15. The method as recited in claim 14 further comprising:

supplying a digital representation of the sampling threshold to at least one digital to analog converter (DAC);

generating an analog representation of the sampling threshold; and

supplying the analog representation as the offset to the amplifier.

16. The method as recited in claim 15 wherein a most significant portion of the digital representation of the sampling threshold is supplied to a first DAC and a least significant portion to a second DAC.

17. The method as recited in claim 16 wherein at least a portion of the digital representation supplied to the first and second DACs overlap.

18. The method as recited in claim 1 wherein the LOS threshold value is supplied as an analog signal on an input terminal of the integrated circuit.

19. The method as recited in claim 1 wherein a stored calibration value from a previous calibration cycle is used as an initial digital representation of the sampling threshold.

20. The method as recited in claim 1 further comprising selectably providing one of an input data stream and the signal indicative of the LOS threshold value to the sampling circuit according to whether calibration is ongoing.

21. The method as recited in claim 1 further generating the calibrated digital representation of the sampling threshold for a differential representation of a first digital value and utilizing a two'"'"'s complement of the calibrated digital representation for a differential representation of a second digital value.

22. An integrated circuit having a loss of signal (LOS) system for detecting a loss of signal condition for an input data stream according to a LOS threshold, the LOS threshold specifying a minimum signal magnitude, the integrated circuit comprising:

a sampling circuit coupled to sample a LOS signal indicative of the LOS threshold, and to receive a sampling threshold specifying the minimum signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value; and

a digital control circuit coupled to receive an output of the sampling circuit and to generate a calibrated digital representation of the sampling threshold according to a plurality of samples of the LOS signal.

23. The integrated circuit as recited in claim 22 wherein the digital control circuit varies a digital representation of the sampling threshold in response to respective samples of the LOS signal.

24. The integrated circuit as recited in claim 23 wherein the digital control circuit determines the calibrated digital representation as an arithmetic mode of the digital representations of the sampling threshold.

25. The integrated circuit as recited in claim 22 wherein the digital control circuit determines the calibrated digital representation according to an average of the digital representations of the sampling threshold.

26. The integrated circuit as recited in claim 25 wherein the digital control circuit further comprises at least one storage location storing the average, the at least one storage location coupled to supply at least a portion of the digital representation during calibration.

27. The integrated circuit as recited in claim 22 wherein the LOS signal is an analog signal.

28. The integrated circuit as recited in claim 22 further comprising a digital to analog converter coupled to convert the calibrated digital representation to an analog signal and to supply the analog signal to the sampling circuit as the sampling threshold.

29. The integrated circuit as recited in claim 22 further comprising a down sampling circuit coupling the output of the sampling circuit to the digital control circuit, to provide a reduced number of samples to the digital control circuit.

30. The integrated circuit as recited in claim 22 wherein the digital control circuit further comprises an up/down counter coupled to count in a direction determined according to a digital value of respective samples of the LOS signal and wherein the up/down counter is coupled to supply a digital representation of at least a portion of the sampling threshold during calibration.

31. The integrated circuit as recited in claim 30 wherein the digital control circuit determines the calibrated digital representation of the sampling threshold as an average of a plurality of values of at least a portion of the output of the up/down counter.

32. The integrated circuit as recited in claim 30 further comprising:

a first digital to analog converter (DAC) coupled to receive an average of a plurality of samples of a most significant portion of the output of the up/down counter;

a second digital to analog converter (DAC) coupled to receive an average of a plurality of samples of a least significant portion of the output of the up/down counter; and

wherein the first and second DAC supply the sampling threshold to the sampling circuit.

33. The integrated circuit as recited in claim 22 wherein the sampling circuit further comprises a register circuit, the register circuit including an amplifier and wherein the sampling threshold is coupled to the register circuit as an offset to the amplifier.

34. The integrated circuit as recited in claim 22 further comprising an input terminal coupled to receive the LOS threshold as an analog signal.

35. The integrated circuit as recited in claim 22 further comprising a storage location coupled to store a previous calibrated digital representation from a previous calibration cycle for use as an initial digital representation of the sampling threshold.

36. The integrated circuit as recited in claim 22 further comprising a selector circuit coupled to selectably provide one of the input data stream and the LOS signal to the sampling circuit according to whether calibration is ongoing.

37. The integrated circuit as recited in claim 22 wherein the digital control circuit further comprises at least one register coupled to supply a calibrated digital representation of the sampling threshold when the integrated circuit is not being calibrated.

38. An apparatus for calibrating a loss-of-signal (LOS) system in an integrated circuit used for determining existence of a loss-of-signal condition, the apparatus comprising:

means for sampling a signal indicative of a LOS threshold and providing a digital indication thereof;

means for obtaining a plurality of samples from the sampling means and generating, based on the samples, a calibrated digital representation of a sampling threshold for the sampling means, the sampling threshold determining a signal level at which a signal sampled by the sampling means is sampled as a one or zero; and

means for supplying an analog representation of the calibrated digital representation to the sampling means.