Storage mapping and partitioning among multiple host processors

• US 6,799,255 B1
• Filed: 02/02/2001
• Issued: 09/28/2004
• Est. Priority Date: 06/29/1998
• Status: Expired due to Term

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: EMC Corporation (Dell Technologies Inc.)
• Inventors: Blumenau, Steven M., Raz, Yoav
• Primary Examiner(s): Sparks, Donald
• Assistant Examiner(s): Peugh, Brian R.
• Application Number:
  US09/776,327
• Time in Patent Office: 1,334 Days
• Field of Search: 711/113, 711/111, 711/112, 711/4, 711/206, 711/207, 711/208, 711/221, 711/152, 711/149, 711/173, 710/217
• US Class Current: 711/152
• CPC Class Codes: G06F 21/80 in storage media based on magnetic or optical technology, e.g. disks with sectors preventing unauthorised reproduction or copying of disc-type recordable media G11B20/00
• CPC Class Codes: G06F 3/0622 in relation to access
• CPC Class Codes: G06F 3/0637 Permissions
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD
• CPC Class Codes: G06F 9/5016 the resource being the memory
• CPC Class Codes: Y10S 707/99933 Query processing, i.e. searching
• CPC Class Codes: Y10S 707/99934 Query formulation, input preparation, or translation
• CPC Class Codes: Y10S 707/99935 Query augmenting and refining, e.g. inexact access
• CPC Class Codes: Y10S 707/99942 Manipulating data structure, e.g. compression, compaction, compilation

Abstract

A storage controller for controling access to data storage has a memory and at least one data port for a data network including host processors. The memory is programmed to define a respective specification for each host processor of a respective subset of the data storage to which access by the host processor is restricted, and each specification is associated with a host identifier stored in the memory. When the storage controller receives a data access request from a host processor, it decodes a host identifier from the data access request, and searches the memory for a host identifier matching the host identifier decoded from the request. Upon finding a match, the respective specification of the respective subset for the host processor is accessed to determine whether or not storage specified by the storage access request is contained in the respective subset. If so, then storage access can continue, and otherwise, storage access is denied. Preferably the host identifier decoded from the request is a temporary address assigned by the network, and also stored in the memory in association with each respective specification is a relatively permanent identifier for the host processor.

Claims

1. A method of operating a storage controller for controlling access to data storage, the storage controller having a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, said method comprising:

a) storing in memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the first host processor is restricted to by said storage controller, and storing in the memory information identifying a second host processor and, in association with the information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted to by said storage controller, wherein the first host processor has access through the data port to the first subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage;

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing an identification of said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by;

(i) decoding from the request for storage access the identification of said one of the host processors contained in the request for storage access;

(ii) searching the memory to find the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iii) upon finding the information identifying the host processor identified by the identification decoded from the request for storage access, accessing in the memory the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, in order to determine whether or not the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iv) accessing the specified portion of the data storage upon finding that the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the associated information identifying the host processor identified by the identification decoded from the request for storage access.

2. The method as claimed in claim 1, wherein the identification of said one of the host processors contained in the request includes a temporary address assigned by the network to said one of the host processors, and the information identifying the host processor identified by the identification decoded from the request for storage access also includes said temporary address assigned by the network to said one of the host processors.

3. The method as claimed in claim 2, wherein said one of the host processors has a plurality of ports connected to the data storage for data transmission between the data storage and said one of the host processors, and each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the method includes storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and the storage controller accessing the memory in response to storage access requests from each of the plurality of ports in order to restrict access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

4. The method as claimed in claim 1, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

5. The method as claimed in claim 4, which includes establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.

6. The method as claimed in claim 1, which includes the storage controller responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

7. A method of operating a storage controller for controlling access to data storage, the storage controller having a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, said method comprising:

a) storing in memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the fit host processor is restricted to by said storage controller, and storing in the memory information identifying a second host processor and, in association with the information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted by said storage controller, wherein the first host processor has access through the data port to the fist subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage, wherein the data network assigns at least one temporary address to each of the first and second host processor, and each of the first and second host processors also has a relatively permanent identifier, and the identification of each of the first and second host processors stored in memory includes the relatively permanent identifier and any temporary address currently assigned to said each of the first and second host processors; and

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing a temporary address currently assigned to said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by decoding from the request for storage access the temporary address currently assigned to said one of the host processors contained in the request for storage access, and using the temporary address decoded from the request for storage access in order to access the memory to determine whether or not the specified portion of the data storage to access is contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, and when the specified portion of the data storage to access is determined to be contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, accessing the specified portion of the data storage.

8. The method as claimed in claim 7, wherein said one of the host processors has a plurality of ports connected to the data storage for data transmission between the data storage and said one of the host processors, and each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the method includes storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and the storage controller accessing the memory in response to storage access requests from each of the plurality of ports in order to restrict access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

9. The method as claimed in claim 7, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

10. The method as claimed in claim 9, which includes establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.

11. The method as claimed in claim 7, which includes the storage controller responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

12. A data storage subsystem comprising, in combination:

data storage; and

a storage controller coupled to the data storage for controlling access to the data storage, the storage controller having memory and a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, wherein the storage controller is programmed for;

a) storing in the memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the first host processor is restricted to by said storage controller, and storing in the memory information identifying a second host processor and, in association with the information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted to by said storage controller, wherein the first host processor has access through the data port to the first subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage;

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing an identification of said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by;

(i) decoding from the request for storage access the identification of said one of the host processors contained in the request for storage access;

(ii) searching the memory to find the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iii) upon finding the information identifying the host processor identified by the identification decoded from the request for storage access, accessing in the memory the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, in order to determine whether or not the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iv) accessing the specified portion of the data storage upon finding that the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access.

13. The data storage subsystem as claimed in claim 12, wherein the identification of said one of the host processors contained in the request includes a temporary address assigned by the network to said one of the host processors, and the associated information identifying the host processor identified by the identification decoded from the request for storage access also includes said temporary address assigned by the network to said one of the host processors.

14. The data storage subsystem as claimed in claim 13, wherein said one of the host processors has a plurality of ports connected to the data storage for data transmission between the data storage and said one of the host processors, and each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the storage controller is programmed for storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and for restricting access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

15. The data storage subsystem as claimed in claim 17, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

16. The data storage subsystem as claimed in claim 15, wherein the storage controller is programmed for establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and for permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.

17. The data storage subsystem as claimed in claim 12, wherein the storage controller is programmed for responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

18. A data storage subsystem comprising, in combination:

data storage; and

a storage controller coupled to the data storage for controlling access to the data storage, the storage controller having memory and a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, wherein the storage controller is programmed for;

a) storing in memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the first host processor is restricted to by said storage controller, and storing in the memory information identifying a second host processor and, in association with the information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted to by said storage controller, wherein the first host processor has access through the data port to the first subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage, wherein the data network assigns at least one temporary address to each first and second host processor, and said each first and second host processor also has a relatively permanent identifier, and the identification of said each first and second host processor stored in memory includes the relatively permanent identifier and any temporary address currently assigned to said each first and second host processor; and

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing a temporary address currently assigned to said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by decoding from the request for storage access the temporary address currently assigned to said one of the host processors contained in the request for storage access, and using the temporary address decoded from the request for storage access in order to access the memory to determine whether or not the specified portion of the data storage to access is contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, and when the specified portion of the data storage to access is determined to be contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, accessing the specified portion of the data storage.

19. The data storage subsystem as claimed in claim 18, wherein said storage controller is programmed to permit said one of the host processors to have a plurality of ports connected to the data storage for data transmission between the data storage and aid one of the host processors, wherein each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the storage controller is programmed for storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and for accessing the memory in response to storage access requests from each of the plurality of ports in order to restrict access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

20. The data storage subsystem as claimed in claim 18, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

21. The data storage subsystem as claimed in claim 20, wherein the storage controller is programmed for establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.

22. The data storage subsystem as claimed in claim 18, wherein the storage controller is programmed for responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

33. The machine readable program storage device as claimed in claim 20, wherein the program is executable by the storage controller for responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

23. A machine readable program storage device containing a program for execution by a storage controller to control access to data storage, the storage controller having memory and a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, wherein the program is executable by the storage controller for:

a) storing in the memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the first host processor is restricted to by said storage controller, and storing in the memory information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted to by the storage controller, wherein the first host processor has access through the data port to the first subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage;

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing an identification of said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by;

(i) decoding from the request for storage access the identification of said one of the host processors contained in the request for storage access;

(ii) searching the memory to find the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iii) upon finding the information identifying the host processor identified by the identification decoded from the request for storage access, accessing in the memory the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, in order to determine whether or not the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access, and

(iv) accessing the specified portion of the data storage upon finding that the portion of the data storage specified by the request for storage access is contained in the respective subset of the data storage specified by the respective specification which is associated with the information identifying the host processor identified by the identification decoded from the request for storage access.

24. The machine readable program storage device as claimed in claim 23, wherein the identification of said one of the host processors contained in the request includes a temporary address assigned by the network to said one of the host processors, and the information identifying the host processor identified by the identification decoded from the request for storage access also includes said temporary address assigned by the network to said one of the host processors.

25. The machine readable program storage device as claimed in claim 24, wherein said one of the host processors has a plurality of ports connected to the data storage or data transmission between the data storage and said one of the host processors, and each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the storage controller is programmed for storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and for restricting access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

26. The machine readable program storage device as claimed in claim 23, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

27. The machine readable program storage device as claimed in claim 26, wherein the program is executable by the storage controller for establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and for permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.

28. The machine readable program storage device as claimed in claim 23, wherein the storage controller is programmed for responding to a request from said one of the host processors for a report of the subset of the data storage to which access by said one of the host processors is restricted by accessing the memory to return to said one of the host processors a report of the subset of the data storage to which access by said one of the host processors is restricted.

29. A machine readable program storage device containing a program for execution by a storage controller to control access to data storage, the storage controller having memory and a data port for connecting the storage controller into a data network for data transmission between the data storage and host processors in the data network, wherein the program is executable by the storage controller for:

a) storing in the memory information identifying a first host processor and, in association with the information identifying the first host processor, information identifying a first specification for the first host processor of a first subset of the data storage to which access by the first host processor is restricted to by said storage controller, and storing in the memory information identifying a second host processor and, in association with the information identifying the second host processor, a second specification for the second host processor of a second subset of the data storage to which access by the second host processor is restricted to by said storage controller, wherein the first host processor has access through the data port to the first subset of the data storage and the second host processor has access through the data port to the second subset of the data storage, the first subset of the data storage being different from the second subset of the data storage so that the first host processor is restricted from accessing through the data port at least some data storage in the second subset of the data storage and so that the second host processor is restricted from accessing through the data port at least some data storage in the first subset of the data storage, wherein the data network assigns at least one temporary address to said each host processor, and said each host processor also has a relatively permanent identifier, and the identification of said each host processor stored in memory includes the relatively permanent identifier and any temporary address currently assigned to said each host processor; and

b) receiving at the data port a request for storage access from one of the first and second host processors, the request from said one of the host processors containing a temporary address currently assigned to said one of the host processors and a specification of a portion of the data storage to access, and the storage controller responding to the request for storage access by decoding from the request for storage access the temporary address currently assigned to said one of the host processors contained in the request for storage access, and using the temporary address decoded from the request for storage access in order to access the memory to determine whether or not the specified portion of the data storage to access is contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, and when the specified portion of the data storage to access is determined to be contained in the respective subset of the data storage to which access is permitted by the host processor having the temporary address decoded from the request for storage access, accessing the specified portion of the data storage.

30. The machine readable program storage device as claimed in claim 29, wherein the program is executable by the storage controller to permit said one of the host processors to have a plurality of ports connected to the data storage for data transmission between the data storage and said one of the host processors, wherein each of the plurality of ports has a different temporary address and a respective subset of the data storage to which access by said one of the host processors from each of the plurality of ports is restricted, and wherein the program is executable by the storage controller for storing in the memory a respective specification for said each of the plurality of ports of the respective subset of the data storage to which access by said one of the host processors from each of the plurality of the ports is restricted, and for accessing the memory in response to storage access requests from each of the plurality of ports in order to restrict access by said one of the host processors to the respective subset of the data storage from each of the plurality of the ports.

31. The machine readable program storage device as claimed in claim 29, wherein the respective specification for each host processor of a respective subset of the data storage to which access by said each host processor is restricted includes a respective mapping of logical unit numbers used by said each host processor in storage access requests to addresses of logical storage units used by the storage controller for accessing the data storage in response to the storage access requests from said each host processor.

32. The machine readable program storage device as claimed in claim 31, wherein the program is executable by the storage controller for establishing the respective mapping by displaying to a system administrator a list of available logical storage units in the data storage and an outline of attributes of said each host processor including logical unit numbers that are usable by said each host processor in storage access requests, and permitting the system administrator to select a logical storage unit from the list of logical storage units and to select a logical unit number from the list of logical unit numbers to establish a mapping between the selected logical storage unit and the selected logical unit number.