Hysteretic DC-DC converters

• US 6,801,026 B2
• Filed: 12/20/2002
• Issued: 10/05/2004
• Est. Priority Date: 12/20/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Schrom, Gerhard, Hazucha, Peter, Hahn, Jae-Hong
• Primary Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US10/326,738
• Publication Number:
  US 20040120169A1
• Time in Patent Office: 655 Days
• Field of Search: 323/272, 323/282, 323/284, 363/65
• US Class Current: 323/272
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: H02M 3/1586 switched with a phase shift, i.e. interleaved

Abstract

According to some embodiments, a plurality of single-phase hysteretic converters operate in accordance with associated synchronization signals.

Claims

1. An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein each converter is coupled to the output voltage line and is to operate in accordance with an associated synchronization signal, wherein each converter includes a hysteretic comparator and the associated synchronization signal is introduced via an input of the hysteretic comparator.

2. The apparatus of claim 1, wherein the synchronization signals are phase shifted such that the distribution of the synchronization signals over a clock period is substantially uniform.

3. The apparatus of claim 1, wherein the synchronization signals have a triangular shape.

4. The apparatus of claim 1, wherein the apparatus comprises a multi-phase DC-DC power convener and the output voltage is associated with a processor.

5. The apparatus of claim 1, further comprising:

a reference voltage line to receive a reference voltage, wherein each converter receives the associated synchronization signal superimposed on the reference voltage.

6. The apparatus of claim 5, wherein the synchronization signals have a relatively small magnitude as compared to the reference voltage.

7. The apparatus of claim 5, wherein each convener comprises:

a hysteretic comparator to receive the reference voltage combined with the synchronization signal associated with that converter; and

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with an input of the hysteretic comparator.

8. The apparatus of claim 7, wherein the switching bridge is associated with one of:

(i) a p-channel metal-oxide-semiconductor device and a diode and (ii) a p-channel metal-oxide-semiconductor device and an n-channel metal-oxide-semiconductor device.

9. The apparatus of claim 7, wherein the magnitude of the synchronization signals are associated with a hysteresis window width of the hysteretic converters.

10. An apparatus, comprising:

an output voltage line to provide an output voltage;

a hysteretic comparator to receive via a first input a signal associated with a reference voltage and a synchronization signal, the synchronization signal having a relatively small magnitude as compared to the reference voltage; and

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator, wherein the hysteretic comparator receives via the first input a signal comprising the synchronization signal added to the reference voltage.

11. A method of facilitating DC to DC power conversion, comprising:

generating a plurality of synchronization signals; and

providing each of the synchronization signals to an associated single-phase hysteretic converter, wherein each convener includes a hysteretic comparator and the associated synchronization signal is provided via an input of the hysteretic comparator.

12. The method of claim 11, wherein the synchronization signals are phase shifted such that the distribution of the synchronization signals over a clock period is substantially uniform.

13. The method of claim 11, wherein the converters operate in parallel.

14. The method of claim 11, wherein the synchronization signals are provided to the converters by adding the signals to a reference voltage.

15. A system, comprising:

a chipset; and

a die comprising a microprocessor in communication with the chipset, wherein the microprocessor includes a power converter comprising;

a reference voltage line to receive a reference voltage,

an output voltage line to provide an output voltage, and

a plurality of parallel single-phase hysteretic converters, wherein each converter is coupled to the output voltage line and is to operate in accordance with an associated synchronization signal, wherein each converter includes a hysteretic comparator and the associated synchronization signal is introduced via an input of the hysteretic comparator.

16. The system of claim 15, wherein the power converter comprises a multi-phase DC-DC power converter.

17. An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein at least a first converter of the plurality of converters includes;

a hysteretic comparator to receive a reference voltage via a first input;

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator;

a first and second resistor in series coupled to the output of the switching bridge and the second input of the hysteretic comparator; and

a third resister coupled to the input of the switching bridge and a point between the first and second resistors.

18. The apparatus of claim 17, wherein the first converter comprises a DC-DC power converter.

19. An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein each of the plurality of converters includes;

a hysteretic comparator to receive a reference voltage via a first input;

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator; and

a capacitor coupled to the output voltage line and the second input of the hysteretic comparator.

20. The apparatus of claim 19, wherein the first converter comprises a DC-DC power converter and the capacitor improves a transient response of the converter.

21. The apparatus of claim 19, wherein at least one of an inverter and a buffer is positioned between the output of the hysteretic comparator and the input of the switching bridge.

22. The apparatus of claim 19, wherein an inductor is positioned between the output of the switching bridge and the output voltage line.

23. The apparatus of claim 19, wherein a resistor is positioned between the output of the switching bridge and the second input of the hysteretic converter.

24. The apparatus of claim 19, wherein another capacitor is positioned between the output voltage line and ground.

25. An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein each of the plurality of converters includes;

a hysteretic comparator to receive a reference voltage via a first input;

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator;

a capacitor coupled to the output voltage line and the second input of the hysteretic comparator; and

a resistor-capacitor series coupled to the output voltage line and the second input of the hysteretic comparator.

26. The apparatus of claim 25, wherein the first converter comprises a DC-DC power converter and the resistor-capacitor series improves a frequency stability of the converter.

27. An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein each of the plurality of converters includes;

a hysteretic comparator to receive a reference voltage via a first input;

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator; and

a resistor coupled to the input of the switching bridge and the second input of the hysteretic comparator.

28. The apparatus of claim 27, wherein the first converter comprises a DC-DC power converter and the resistor facilitates voltage positioning for the converter.

29. The apparatus of claim 27, further comprising a resister and capacitor in series coupled to the output of the hysteretic comparator and the second input of the hysteretic comparator.

30. A An apparatus, comprising:

an output voltage line to provide an output voltage; and

a plurality of parallel single-phase hysteretic converters, wherein at least a first converter of the plurality of converters includes;

an integrator, including;

an amplifier to receive a reference voltage via a first input, and

a capacitor coupled to the output of the amplifier and a second input of the amplifier;

a hysteretic comparator to receive via a first input a signal associated with the output of the amplifier;

a switching bridge to receive a signal associated with an output of the hysteretic comparator and to provide a signal associated with the output voltage and a second input of the hysteretic comparator; and

a first resistor coupled to a second input of the amplifier and the second input of the hysteretic comparator.

31. The apparatus of claim 30, further comprising:

a second resistor between the output of the amplifier and the first input of the hysteretic comparator.

32. The apparatus of claim 31, wherein the second resistor is associated with a synchronization signal.

33. The apparatus of claim 30, wherein an offset voltage associated with the amplifier is less than an offset voltage associated with the hysteretic comparator.