Software management systems and methods for automotive computing devices

• US 6,801,994 B2
• Filed: 12/20/2000
• Issued: 10/05/2004
• Est. Priority Date: 12/20/2000
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Drasnin, Sharon, Radko, Ronald Otto, Beckert, Richard Dennis
• Primary Examiner(s): BRAGDON, REGINALD GLENWOOD
• Application Number:
  US09/745,894
• Publication Number:
  US 20020116588A1
• Time in Patent Office: 1,385 Days
• Field of Search: 711/103, 711/104, 711/105, 711/206, 711/207, 711/159, 711/160, 711/133
• US Class Current: 711/207
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/122 of the least frequently used [LFU] type, e.g. with individual count value
• CPC Class Codes: G06F 2212/2022 Flash memory

Abstract

Methods and systems for operating automotive computing devices are described. In one embodiment, a small amount of static RAM (SRAM) is incorporated into an automotive computing device and is battery-backed to provide a non-volatile memory space in which critical data, e.g. the object store, can be maintained in the event of a power loss. Circuitry is provided to ensure that the SRAM receives back up power from the battery at appropriate times. Software manages the SRAM and the other storage assembly components and makes use of virtual paging or virtual addressing techniques to keep track of where various pages, including object store pages, are stored in the system.

Claims

1. In an automotive computing device, a method comprising:

maintaining a translation look-aside buffer that contains entries for recently translated virtual page addresses;

maintaining a page table in device memory that contains a map for every valid virtual page address; and

maintaining an object store page table in device SRAM that contains information associated with locations for every object store page.

2. The method of claim 1 further comprising updating the object store page table in the SRAM responsive to paging an object store page within the device.

3. The method of claim 1 further comprising battery-backing the SRAM in an event of a power loss.

4. The method of claim 1 further comprising paging object store pages from non-volatile memory to volatile memory responsive to accessing the pages in the non-volatile memory.

5. The method of claim 1 further comprising paging object store pages from DRAM to SRAM or to a separate DRAM buffer, in the event of a write access.

6. The method of claim 1 further comprising maintaining dirty object store pages in SRAM in the event of a power failure.

7. The method of claim 1 further comprising writing contents of a device DRAM to a device flash memory in a predetermined amount of time in the event of a power loss.

8. The method of claim 1 further comprising copying one or more dirty object store pages from SRAM to a device flash memory to make room in the SRAM for additional dirty object store pages.

9. The method of claim 1 further comprising copying one or more dirty object store pages from a device DRAM to a device flash memory to make room in the DRAM for additional dirty object store pages.

10. A programmable automotive computing device programmed with instructions which, when executed by the computing device, cause the computing device to:

maintain a translation look-aside buffer that contains entries for recently translated virtual page addresses;

maintain a page table in device memory that contains a map for every valid virtual page address;

maintain an object store page table in device SRAM that contains information associated with locations for every object store page;

update the object store page table in the SRAM responsive to paging an object store page within the device;

flush pages from SRAM to another medium in a predetermined manner to make room for additional pages in the SRAM; and

battery-back the SRAM in an event of a power failure.

11. An automobile embodying the automotive computing device of claim 10.

12. A programmable automotive computing device programmed with instructions which, when executed by the computing device, cause the computing device to:

maintain a translation look-aside buffer that contains entries for recently translated virtual page addresses;

maintain a page table in device memory that contains a map for every valid virtual page address;

maintain an object store page table in a dedicated DRAM buffer, the object store page table containing information associated with locations for every object store page;

update the object store page table in the DRAM buffer responsive to paging an object store page within the device;

flush pages from the DRAM buffer to another medium in a predetermined manner to make room for additional pages in the DRAM buffer; and

copy an amount of data contained in the DRAM buffer to flash memory in the event of a power failure.

13. An automotive computing system comprising:

a central processing unit having a translation look-aside buffer that contains entries for recently translated virtual page addresses;

physical memory operably associated with the central processing unit and containing a page table that contains a map for every valid virtual page address; and

SRAM containing an object store page table that contains information associated with locations for every object store page in the event of a power failure.

14. In an automotive computing device, a method comprising:

maintaining multiple object store pages in device SRAM;

determining when to flush pages as a function of how many free SRAM pages are available;

periodically flushing one or more object store pages to device non-volatile memory to make room for additional object store pages; and

assigning multiple threads with different priorities to flush pages in accordance with their priorities.

15. The method of claim 14 further comprising battery-backing the SRAM in the event of a power loss.

16. The method of claim 14 further comprising battery-backing the SRAM in the event that a voltage, associated with operation of a vehicle that embodies the computing device, drops out of regulation.

17. The method of claim 14 further comprising tracking the frequency of object store page writes, and flushing object store pages that are least frequently written to, before object store pages that are more frequently written to.

18. The method of claim 14, wherein said assigning comprises assigning threads with low, medium, and high priorities.

19. In an automotive computing device, a method comprising:

providing device SRAM that is configured to be backed by a battery in an event of a power loss;

maintaining a translation look-aside buffer that contains entries for recently translated virtual page addresses;

maintaining a page table in device memory that contains a map for every valid virtual page address;

maintaining an object store page table in the device SRAM that contains information associated with locations for every object store page;

updating the object store page table in the SRAM responsive to paging an object store page within the device; and

battery-backing the SRAM in an event of a power loss.

20. The method of claim 19 further comprising paging object store pages from non-volatile memory to volatile memory responsive to accessing the pages in the non-volatile memory.

21. The method of claim 19 further comprising paging object store pages from DRAM to SRAM or to a separate DRAM buffer, in the event of a write access.

22. The method of claim 19 further comprising maintaining dirty object store pages in SRAM in the event of a power failure.

23. The method of claim 19 further comprising writing contents of a device DRAM to a device flash memory in a predetermined amount of time in the event of a power loss.

24. The method of claim 19 further comprising copying one or more dirty object store pages from SRAM to a device flash memory to make room in the SRAM for additional dirty object store pages.

25. The method of claim 19 further comprising copying one or more dirty object store pages from a device DRAM to a device flash memory to make room in the DRAM for additional dirty object store pages.