Multi-layer double-sided wiring board and method of fabricating the same

• US 6,803,528 B1
• Filed: 03/26/2002
• Issued: 10/12/2004
• Est. Priority Date: 11/05/1999
• Status: Expired due to Fees

• Current Assignee: 3M Innovative Properties Company (3M Company)
• Original Assignee: 3M Innovative Properties Company (3M Company)
• Inventors: Koyanagi, Tatsunori
• Primary Examiner(s): Zarneke, David A.
• Assistant Examiner(s): PATEL, ISHWARBHAI B
• Application Number:
  US10/088,982
• Time in Patent Office: 931 Days
• Field of Search: 174/262, 174/266, 174/264, 174/261, 174/255, 174/265, 174/256, 361/792, 361/803, 298/46, 298/52, 298/25
• US Class Current: 174/262
• CPC Class Codes: H05K 2201/0166 Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
• CPC Class Codes: H05K 2201/0394 Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 2201/09827 Tapered, e.g. tapered hole, via or groove bevelled, chamferred or tapered edge H05K2201/09154
• CPC Class Codes: H05K 2203/0361 Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
• CPC Class Codes: H05K 2203/0554 Metal used as mask for etching vias, e.g. by laser ablation
• CPC Class Codes: H05K 3/388 by the use of a metallic or inorganic thin film adhesion layer
• CPC Class Codes: H05K 3/4076 by thin-film techniques
• CPC Class Codes: H05K 3/421 Blind plated via connections H05K3/422, H05K3/423 and H05K3/425 take precedence
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

Disclosed herein are multi-layer double-sided wiring boards having an insulating layer with an opening, conductive layers on both surfaces of the insulating layer and on the inside of the opening, and an interface layer between the insulating layer and portions of the conductive layers wherein the conductive layers are in direct contact in the opening. Also disclosed are methods of fabricating such multi-layer double-sided wiring boards.

Claims

1. A multi-layer double-sided wiring board comprising:

an insulating layer having an opening formed therein;

a first conductive layer formed on an upper surface of the insulating layer;

a second conductive layer formed on a lower surface of the insulating layer and covering an inside wall of the opening and a portion of the first conductive layer which is exposed in the opening; and

an interface layer interposed between the insulating layer and at least a portion of one or both of the first and second conductive layers including the portion of the second conductive layer covering an inside wall of the opening, and wherein

the first and second conductive layers are materials having the same conductivity,

the interface layer contains a material different from the materials of the first and second conductive layers, and

the second conductive layer directly contacts the first conductive layer in the portion of the opening adjacent the upper surface of the insulating layer without the interface layer being interposed therebetween.

2. A multi-layer double-sided wiring board according to claim 1, wherein the interface layer contains at least one metallic element selected from the group consisting of nickel, cobalt, zinc, and chromium.

3. A multi-layer double-sided wiring board according to claim 1, wherein the first and second conductive layers are made of the same material.

4. A multi-layer double-sided wiring board according to claim 1, wherein the first and second conductive layers are made of copper.

5. A method of fabricating a multi-layer double-sided wiring board, comprising the steps of:

selectively removing a portion of an insulating layer on an upper surface of which is formed a conductive layer, and thereby forming in the insulating layer an opening whose upper end is closed with the conductive layer;

forming an interface layer over an entire lower surface;

selectively removing at least a portion of the interface layer which contacts the first conductive layer; and

forming a conductive layer over the entire lower surface.