Method and apparatus for improved detection of rate errors in variable rate receivers
First Claim
1. A method for detecting rate errors in a variable rate receiver, comprising:
- receiving an encoded speech signal;
performing a rate determination algorithm on the speech signal to provide an encoded rate; and
detecting errors in the provided rate, by analyzing the relationship between fixed code book gains and linear prediction coefficient gains to create a threshold curve and validating the received speech with respect to the threshold curve.
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Accused Products
Abstract
A system and method for detection of rate determination algorithm errors in variable rate communications system receivers. The disclosed embodiments prevent rate determination algorithm errors from causing audible artifacts such as screeches or beeps. The disclosed system and method detects frames with incorrectly determined data rates and performs frame erasure processing and/or memory state clean up to prevent propagation of distortion across multiple frames. Frames with incorrectly determined data rates are detected by checking illegal rate transitions, reserved bits, validating unused filter type bit combinations and analyzing relationships between fixed code-book gains and linear prediction coefficient gains.
38 Citations
52 Claims
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1. A method for detecting rate errors in a variable rate receiver, comprising:
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receiving an encoded speech signal;
performing a rate determination algorithm on the speech signal to provide an encoded rate; and
detecting errors in the provided rate, by analyzing the relationship between fixed code book gains and linear prediction coefficient gains to create a threshold curve and validating the received speech with respect to the threshold curve. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
creating a set of illegal rate transitions of consecutive frames of speech based on knowledge of speech classification and phonetic character of conversational speech; and
determining the occurrence of illegal rate transitions.
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3. The method of claim 2 wherein the set of illegal rate transitions comprises a full-rate frame followed by an eighth-rate frame.
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4. The method of claim 2 wherein the set of illegal rate transitions comprises a full-rate, Type-1 frame followed by an eighth-rate frame.
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5. The method of claim 2 wherein the set of illegal rate transitions comprises a half-rate, Type-1 frame followed by an eighth-rate frame.
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6. The method of claim 2 wherein the set of illegal rate transitions comprises a quarter-rate frame followed by a Type-1 full-rate frame.
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7. The method of claim 2 wherein the set of illegal rate transitions comprises a quarter-rate frame followed by a Type-1 half-rate frame.
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8. The method of claim 2 wherein the set of illegal rate transitions comprises an eighth-rate frame followed by a Type-1 full-rate frame.
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9. The method of claim 2 wherein the set of illegal rate transitions comprises an eighth-rate frame followed by a Type-1 half-rate frame.
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10. The method of claim 2 wherein the set of illegal rate transitions comprises an eighth-rate frame followed by a quarter-rate frame followed by an eighth-rate frame.
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11. The method of claim 2 wherein the set of illegal rate transitions comprises an eighth-rate frame followed by a half-rate frame followed by an eighth-rate frame.
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12. The method of claim 2 wherein the set of illegal rate transitions comprises an eighth-rate frame followed by a full-rate frame followed by an eighth-rate frame.
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13. The method of claim 1 wherein the detecting errors in the provided rate further comprises:
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encoding at least one reserved bit of a frame of speech to a predetermined value; and
validating the predetermined value of a received reserved bit corresponding to the encoded reserved bit.
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14. The method of claim 1 wherein the detecting errors in the provided rate further comprises:
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encoding an unused filter type identifier for a frame of speech to a predetermined value; and
validating the predetermined value of an unused filter type identifier corresponding to the encoded filter type identifier.
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15. The method of claim 14 wherein the filter type identifier comprises two bits.
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16. The method of claim 15 wherein three of four two-bit combinations identify three filter types, and one two-bit filter type identifier combination is unused.
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17. The method of claim 1 further comprising perceptually smoothing the effects of detected rate errors by performing memory state reset processing.
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18. The method of claim 17 wherein the memory state reset processing comprises overwriting memory values with zeros.
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19. The method of claim 17 wherein the memory state reset processing comprises overwriting memory values with initialization values.
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20. The method of claim 17 wherein the memory state reset processing is performed on moving-average vector quantizer memory for fixed code book gain.
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21. The method of claim 17 wherein the memory state reset processing is performed on excitation memory.
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22. The method of claim 17 wherein the memory state reset processing is performed on LPC synthesis memory.
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23. The method of claim 17 wherein the memory state reset processing is performed on post-filter synthesis memory.
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24. A rate error detection system, comprising:
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means for receiving an encoded speech signal;
means for performing a rate determination algorithm on the speech signal to provide an encoded rate; and
means for detecting errors in the provided rate by analyzing the relationship between fixed code book gains and linear prediction coefficient gains to create a threshold curve and validating the received speech with respect to the threshold curve. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47)
means for creating a set of illegal rate transitions of consecutive frames of speech, based on knowledge of speech classification and phonetic character of conversational speech; and
means for determining the occurrence of illegal rate transitions.
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28. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for a full-rate frame followed by an eighth-rate frame.
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29. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for a full-rate, Type-1 frame followed by an eighth-rate frame.
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30. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for a half-rate, Type-1 frame followed by an eighth-rate frame.
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31. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for a quarter-rate frame followed by a Type-1 full-rate frame.
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32. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for a quarter-rate frame followed by a Type-1 half-rate frame.
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33. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for an eighth-rate frame followed by a Type-1 full-rate frame.
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34. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for an eighth-rate frame followed by a Type-1 half-rate frame.
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35. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for an eighth-rate frame followed by a quarter-rate frame followed by an eighth-rate frame.
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36. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for an eighth-rate frame followed by a half-rate frame followed by an eighth-rate frame.
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37. The error detection system of claim 27 wherein the means for creating a set of illegal rate transitions comprises means for creating an illegal rate transition for an eighth-rate frame followed by a full-rate frame followed by an eighth-rate frame.
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38. The error detection system of claim 24 wherein the means for detecting errors in the provided rate comprises:
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means for encoding at least one reserved bit of a frame of speech to a predetermined value; and
means for validating the predetermined value of a received reserved bit corresponding to the encoded reserved bit.
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39. The error detection system of claim 24 wherein the means for detecting errors in the provided rate comprises:
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means for encoding an unused filter type identifier for a frame of speech to a predetermined value; and
means for validating the predetermined value of an unused filter type identifier corresponding to the encoded filter type identifier.
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40. The error detection system of claim 24 further comprising means for perceptually smoothing the effects of detected rate errors by performing memory state reset processing.
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41. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for overwriting memory values with zeros.
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42. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for overwriting memory values with initialization values.
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43. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for performing memory state reset processing on moving-average vector quantizer memory for fixed code book gain.
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44. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for performing memory state reset processing on excitation memory.
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45. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for performing memory stat reset processing on LPC synthesis memory.
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46. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for performing memory state reset processing on and post-filter synthesis memory.
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47. The error detection system of claim 24 wherein the means for memory state reset processing comprises means for overwriting memory values with initialization values.
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48. A rate error detection system, comprising:
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a receiver for receiving an encoded speech signal;
a rate determination element for performing a rate determination algorithm on the speech signal to provide an encoded rate; and
a rate error detector for detecting errors in the provided rate, by analyzing the relationship between fixed code book gains and linear prediction coefficient gains to create a threshold curve and validating the received speech with respect to the threshold curve. - View Dependent Claims (49, 50, 51, 52)
an encoder for encoding at least one reserved bit of a frame of speech to a predetermined value; and
a rate error detector for validating the predetermined value of a received reserved bit corresponding to the encoded reserved bit.
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51. The rate error detection system of claim 48 wherein the rate error detector comprises:
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an unused filter type identifier for a frame of speech to a predetermined value; and
a rate error detector for validating the predetermined value of an unused filter type identifier corresponding to the encoded filter type identifier.
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52. The rate error detection system of claim 48 wherein the rate error detector comprises a rate error detector for perceptually smoothing the effects of detected rate errors by performing memory state reset processing.
Specification