Method for determining a type of memory present in a system

• US 6,804,760 B2
• Filed: 06/01/1995
• Issued: 10/12/2004
• Est. Priority Date: 12/23/1994
• Status: Expired due to Fees

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Wiliams, Brett L.
• Primary Examiner(s): KIM, HONG CHONG
• Application Number:
  US08/457,650
• Publication Number:
  US 20030084233A1
• Time in Patent Office: 3,421 Days
• Field of Search: 395/405, 395/442, 395/447.01, 395/447.02, 395/447.03, 395/432, 395/183.01, 365/233, 365/230.03, 365/189.01, 371/21-- 2, 711/5, 711/115, 711/170, 711/105, 714/21.2, 714/718-723
• US Class Current: 711/170
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G11C 11/407 for memory cells of the field-effect type
• CPC Class Codes: G11C 7/1021 Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
• CPC Class Codes: G11C 7/1024 Extended data output [EDO] mode, i.e. keeping output buffer enabled during an extended period of time
• CPC Class Codes: G11C 7/1039 using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: G11C 7/1078 Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
• CPC Class Codes: G11C 7/109 Control signal input circuits
• CPC Class Codes: G11C 7/1096 Write circuits, e.g. I/O line write drivers

Abstract

A system is capable of receiving Fast Page mode, Extended Data Out mode, Burst Extended Data Out mode, or a combination of these memory devices. A method of determining the type of memory present allows the system to adjust internal memory access signals in accordance with the type of memory installed. The system may be shipped with a first type of memory, and then upgraded to a second type of memory by the user to improve overall system performance. A first bank of memory may be of a first type, and a second bank may be of another type. The user may make cost versus performance decisions when upgrading memory types or capacities.

Claims

1. A method of determining an operational mode of memory present in a system, comprising:

applying a column address to a memory;

writing a sequence of data patterns to the memory in a burst mode to at least n, n+1, n+2, and n+3 memory address locations;

reading data from the memory in an Extended Data Out page mode beginning at the column address with a column address strobe being high and advancing the column address with each Extended Data Out page mode cycle; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, wherein comparing data read includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

2. A method of determining an operational mode of memory present in a system, comprising:

writing a sequence of data patterns to a memory in a page mode to a sequence of column addresses;

reading data from the memory in a burst mode; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, wherein comparing data read includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

3. In a system adapted to receive memory having one of a plurality of different operational modes, a method of determining an operational mode of memory present, comprising:

writing a sequence of data patterns to a memory in a page mode to a first sequence of column addresses;

reading data from the memory in a page mode from a second sequence of column addresses; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, wherein comparing data read includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

4. The method according to claim 3 wherein:

data read from the memory is sampled at a transition time of a column address strobe.

5. The method according to claim 3 wherein:

data read from the memory is sampled during a high period of a column address strobe.

6. A method of determining an operational mode of a memory, the memory comprising a plurality of memory cells, the method comprising:

writing a data pattern to a first cell of the memory at a first row address and a first column address in a DRAM early write access cycle format;

accessing the first cell and a second cell of the memory by applying at least two column address strobes in a page mode read format, a first column address strobe being applied in conjunction with the first column address, and a second column address strobe being applied in conjunction with a second column address;

sampling a data output from the memory subsequent to the second column address strobe being applied; and

comparing the data output from the memory with the data pattern to determine the operational mode of memory, wherein comparing data includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

7. The method of claim 6, further comprising:

selecting a set of comparison cells from the plurality of memory cells, said set comprising the first cell and the second cell, wherein selecting a set is performed prior to writing a data pattern.

8. The method of claim 7, further comprising:

programming a memory controller to access the memory in an access mode determined by the type of memory present;

writing, according to the access mode, a functional verification data pattern to all cells of the plurality of memory cells;

reading data, according to the access mode, from all cells; and

comparing data read to the functional verification data pattern to verify functionality of each memory cell of the memory.

9. A method of determining an operational mode of memory, comprising:

writing a first data pattern and a second data pattern to a first and a second address of a memory in a page mode early write cycle format;

reading from the memory in a Burst Extended Data Out format comprising at least three high to low transitions of a column address strobe signal;

driving the column address strobe signal to a high level subsequent to said step of reading;

sampling a memory data output pattern subsequent to said step of driving; and

determining the operational mode of memory dependent on the memory data output pattern, wherein determining the operational mode includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

10. A method of determining an operational mode of memory, comprising:

writing a first data pattern into the memory at address n;

initiating a read command at address n;

sampling data read from address n with an active column address strobe signal, thereby producing a first data sample;

toggling the column address strobe signal to an inactive state and sampling data read from address n, thereby producing a second data sample; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, where the memory is either a page mode, extended data output mode, or burst mode type, wherein comparing includes indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

11. The method of claim 10, wherein comparing the data output from the memory with the data pattern is indicative of a page mode type of operational mode when the first data sample matches the first data pattern and the second sample fails to match the first data pattern.

12. The method of claim 10, wherein comparing the data output from the memory with the data pattern is indicative of an extended data output mode type of operational mode when the first data sample matches the first data pattern and the second sample matches the first data pattern.

13. The method of claim 10, wherein comparing the data output from the memory with the data pattern is indicative of a burst mode type of operational mode when at least one of the first data sample and the second data sample represents invalid data.

14. A method of determining an operational mode of memory, comprising:

writing a first data pattern into the memory at address n;

writing a second data pattern into the memory at address n+1;

writing a third data pattern into the memory at address n+2;

writing a fourth data pattern into the memory at address n+3;

reading data from the memory in a burst mode after five strobe signal cycles at address n; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, where the memory is either a page mode, extended data output mode, or burst mode type, wherein comparing data read includes, when reading data from the memory when a column address strobe is high, indicating an extended data output type of operational mode with the data read from memory matching data written to the memory at address n using a data pattern in a format selected from a group consisting of single discrete cycles and page mode cycles, and with the data read from memory matching the data written to the memory at address n+3 in a burst format.

15. The method of claim 14, wherein writing the first, second, third and fourth data patterns comprises writing the data patterns in a format selected from the group consisting of single discrete cycles, page mode cycles and burst format.

16. The method of claim 15, wherein comparing data read from the memory with data written to the memory is indicative of the burst mode type of operational mode when the data read from the memory matches the data written to the memory but is offset by at least one cycle.

17. The method of claim 15, wherein comparing data read from the memory with data written to the memory is indicative of an operational mode selected from the group consisting of extended data output mode and page mode when the data read from the memory matches the data written to the memory at address n when writing the data patterns in a format selected from the group consisting of single discrete cycles and page mode cycles, and when the data read from the memory matches the data written to the memory at address n+3 when writing the data patterns in burst format.

18. The method of claim 17, wherein, when reading data from the memory when a column address strobe is high, comparing data read from the memory with data written to the memory is indicative of an extended data output type of operational mode when the data read from the memory matches the data written to the memory at address n when writing the data patterns in a format selected from the group consisting of single discrete cycles and page mode cycles, and when the data read from the memory matches the data written to the memory at address n+3 when writing the data patterns in burst format.

19. A method of determining an operational mode of memory, comprising:

writing a first data pattern into the memory at address n;

writing a second data pattern into the memory at address n+1;

writing a third data pattern into the memory at address n+2;

writing a fourth data pattern into the memory at address n+3;

writing the first, second, third and fourth data patterns comprising writing the data patterns in a format selected from the group consisting of single discrete cycles, page mode cycles and burst format;

reading data from the memory in a burst mode after five strobe signal cycles at address n; and

comparing data read from the memory with data written to the memory to determine the operational mode of memory present, where the memory is either a page mode, extended data output mode, or burst mode type;

wherein comparing data read from the memory with data written to the memory is indicative of an operational mode selected from the group consisting of extended data output mode and page mode when the data read from the memory matches the data written to the memory at address n when writing the data patterns in a format selected from the group consisting of single discrete cycles and page mode cycles, and when the data read from the memory matches the data written to the memory at address n+3 when writing the data patterns in burst format; and

wherein, when reading data from the memory when a column address strobe is high, comparing data read from the memory with data written to the memory is indicative of an extended data output type of operational mode when the data read from the memory matches the data written to the memory at address n when writing the data patterns in a format selected from the group consisting of single discrete cycles and page mode cycles, and when the data read from the memory matches the data written to the memory at address n+3 when writing the data patterns in burst format.