Balanced power amplifier with a bypass structure

• US 6,806,768 B2
• Filed: 10/31/2001
• Issued: 10/19/2004
• Est. Priority Date: 10/31/2001
• Status: Expired due to Fees

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Walter, Scott, Chan, Paul L., Persico, Charles J., Klaren, Jonathan
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US10/039,936
• Publication Number:
  US 20040095190A1
• Time in Patent Office: 1,084 Days
• Field of Search: 330/124.R, 330/51
• US Class Current: 330/124.00R
• CPC Class Codes: H03F 2200/198 A hybrid coupler being used as coupling circuit between stages of an amplifier circuit
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

A balanced power amplifier circuit arrangement comprises a driver amplifier stage (22) adapted to receive and amplify a signal. The amplified signal is input to a first coupler (26). The first coupler (26) produces an in-phase signal and an out-of-phase quadrature signal. A first power amplifier (38) receives and amplifies the in-phase signal. A second power amplifier (40) receives and amplifies the out-of-phase signal. A first switch (28) alternately connects an isolated port of the first coupler to ground (32) or a bypass path (36). A second coupler (42) receives and combines the amplified in-phase signal and the amplified out-of-phase signal to produce a combined signal. A second switch (30) alternately connects an isolated port of the second coupler (42) to either ground (34) or the bypass path (36). When the power amplifiers (38, 40) are powered down, the first coupler (26) splits the RF-signal into an in-phase signal and an out-of-phase signal. The power amplifiers (38, 40) appear as reflective impedances to the signal when they are powered down. Each signal reflects off the first and second power amplifiers (38, 40), respectively. The first coupler (26) combines the reflected signals and routes the combined signal through the bypass path (36) to the second coupler (42). The second coupler (42) splits the signal into an in-phase and out-of-phase signal and routes each to the power amplifiers (38, 40). The power amplifiers (38, 40) reflect each signal back to the second coupler (42). The second coupler (42) combines the signals and routes the combined signal to the RF-output port. The circuit arrangement enables the integration of the balanced amplifier and first and second couplers (26, 42) into a single power amplifier package to provide low power bypassing without the need of an external circulator component.

Claims

1. A power amplifier circuit arrangement, comprising:

a first circuit element which receives an input signal, said first circuit element producing an in-phase signal and an out-of-phase signal;

a first power amplifier which receives and amplifies said in-phase signal;

a second power amplifier which receives and amplifies said out-of-phase signal;

a first switch which alternately connects an isolated port of said first circuit element between ground and a bypass path;

a second circuit element which receives and combines said amplified in-phase signal and said amplified out-of-phase signal;

a second switch which alternately connects an isolated port of said second circuit element to ground or said bypass path;

a band-pass filter which receives a signal and outputs a band-passed signal; and

a driver stage which receives said band-passed signal and produces said input signal to be transmitted to said first circuit element.

2. The power amplifier circuit arrangement of claim 1, wherein when said first amplifier and said second amplifier are powered down, said first and second switches connect said isolated ports of said first and second circuit elements via said bypass path in order to bypass said first and second amplifiers.

3. The power amplifier circuit of claim 1, wherein a bias and control circuit biases said driver stage, said first power amplifier, and said second power amplifier, said bias and control circuit also controlling said first and second switches.

4. The power amplifier circuit of claim 1, wherein said first circuit element is a coupler and said second circuit element is a coupler.

5. The power amplifier circuit of claim 1, wherein said first circuit element, said first power amplifier, said second power amplifier, said second circuit element, and said first switch are integrated into a single power amplifier package.

6. The power amplifier of claim 1, further comprising a first terminating resistor connected to a pole of said first switch, and a second terminating resistor connected to a pole of said second switch.

7. The power amplifier of claim 6, wherein said first circuit element, said first power amplifier, and said second power amplifier, said second circuit element, said first switch and said first terminating resistor are integrated into a single power amplifier package.

8. The power amplifier of claim 1, wherein said first circuit element, said first power amplifier, and said second power amplifier, said first switch and said first terminating resistor are integrated into a single package.

9. The power amplifier of claim 1, wherein said first circuit element is a branch-line coupler, and said second circuit element is a branch-line coupler.

10. The power amplifier of claim 7, wherein said second switch and said second terminating resistor are also integrated into said single package.

11. The power amplifier of claim 8, wherein said second switch and said second terminating resistor are also integrated into said single package.

12. The power amplifier of claim 1, wherein said first and said second power amplifiers constitute a balanced amplifier arrangement.

13. A power amplifier circuit arrangement, comprising:

a first switch which alternately switches an input signal between a bypass path and an amplifier path;

a driver stage positioned in said amplifier path and which receives said input signal and produces an amplified signal;

a first circuit element which receives said amplified signal and produces an in-phase signal and an out-of-phase signal;

a first power amplifier which receives and amplifies said in-phase signal;

a second power amplifier which receives and amplifies said out-of-phase signal;

a second switch which alternately connects an isolated port of said first circuit element to ground or said bypass path; and

a second circuit element which receives said amplified in-phase signal and said amplified out-of-phase signal and combines said in-phase and out-of-phase signals into an output signal, wherein an isolated port of said second circuit element is connected to ground.

14. The power amplifier arrangement of claim 13, wherein said first and said second power amplifiers are in a balanced amplifier arrangement.

15. The power amplifier circuit arrangement of claim 13, wherein when said driver stage is powered down, said first switch and said second switch connect said input signal to said bypass path in order to bypass said driver stage and inject said input signal to said first circuit element.

16. The power amplifier circuit arrangement of claim 13, further comprising a band-pass filter positioned between said first switch and said driver amplifier, said band-pass filter band-passing said input signal.

17. The power amplifier circuit of claim 13, wherein a bias and control circuit biases said driver stage, said first power amplifier and said second power amplifier, and said bias and control circuit controls said first switch and said second switch.

18. The power amplifier circuit of claim 13, wherein said first circuit element is a coupler and said second circuit element is a coupler, a first terminating resistor is connected to an isolated port of said second coupler, and a second terminating resistor is connected to a pole of said second switch.

19. The power amplifier circuit of claim 13, wherein said driver stage, said first circuit element, said second circuit element, said first amplifier, and said second amplifier are integrated into a single package.

20. The power amplifier circuit of claim 19, wherein said second switch and are second termination resistor are also integrated into said single package.

21. The power amplifier circuit of claim 18, wherein said first circuit element is a branch-line coupler and said second circuit element is a branch-line coupler.

22. A power amplifier circuit arrangement, comprising:

a first circuit element which receives an input signal and produces an in-phase signal and an out-of-phase signal, said first circuit element having a grounded isolated port;

a first power amplifier which receives and amplifies said in-phase signal;

a second power amplifier which receives and amplifies said out-of-phase signal;

a second circuit element which receives and combines said amplified in-phase signal and said amplified out-of-phase signal to produce an output signal;

a switch which alternately connects an isolated port of said second circuit element to ground or a signal distortion compensation path;

a signal processing circuit which receives a first coupled signal from said input signal and a second coupled signal from said output signal and produces a distortion compensation signal, wherein when said switch connects said isolated port of said second circuit element to said distortion compensation path, said distortion compensation signal being input to said isolated port of said second circuit element.

23. The power amplifier circuit of claim 22, further comprising a driver stage providing said input signal to said first circuit element.

24. The power amplifier circuit of claim 23, wherein a bias and control circuit biases said driver stage, said first power amplifier and said second power amplifier, and said bias and control circuit controls said switch.

25. The power amplifier circuit of claim 22, wherein said first circuit element is a coupler and said second circuit element is a coupler, and a first terminating resistor is connected to said isolated port of said first coupler.

26. The power amplifier circuit of claim 25, wherein a second terminating resistor is connected to a pole of said switch.

27. The power amplifier circuit of claim 22, wherein a third power amplifier amplifies said distortion compensation signal output from said signal processing circuit.

28. The power amplifier circuit of claim 22, where said first circuit element, said first power amplifier, said second power amplifier, said switch, and said second circuit element are integrated into a single package.

29. The power amplifier circuit of claim 24, where said first circuit element, said first power amplifier, said second power amplifier, said second circuit element, said switch, said driver stage, and said bias and control circuit are integrated into a single package.

30. The power amplifier circuit of claim 27, where said first circuit element, said first power amplifier, said second power amplifier, said second circuit element, said switch, and said third power amplifier are integrated into a single package.

33. The method of bypassing the driver amplifier of claim 30, further comprising:

controlling said first switch and said second switch using a bias and control circuit; and

biasing said driver stage, said first amplifier, and said second amplifier using said bias and control circuit.

31. In a power amplifier circuit arrangement comprising a first circuit element adapted receive an input signal and produce an in-phase signal and an out-of-phase signal, a first power amplifier connected to a first output of said first circuit element, a second power amplifier connected to a second output of said first circuit element, a first switch alternately connecting an isolated port of said first circuit element between ground and a bypass path, a second circuit element having a first poll connected to an output of said first power amplifier and a second port connected to an output of said second power amplifier, a second switch alternately connecting an isolated port of said second circuit element between ground and said bypass path, a method of bypassing said first and second power amplifiers comprising:

in a power amplifier bypass mode;

connecting said isolated port of said first circuit element to said bypass path using said first switch;

connecting said isolated port of said second circuit element to said bypass path using said second switch;

splitting said input signal into said in-phase signal and said out-of-phase signal using said first circuit clement;

reflecting said in-phase signal off said first power amplifier;

reflecting said out-of-phase signal off said second power amplifier;

combining said reflected in-phase and said out-of-phase signals at said first circuit element;

transmitting said combined signal from said isolated port of said first circuit element through said bypass path to said isolated port of said second circuit element;

splitting said combined signal into a second in-phase signal and a second out-of-phase signal in said second circuit element;

reflecting said second in-phase signal off said second power amplifier in said second circuit element;

reflecting said second out-of-phase signal off said first power amplifier; and

combining said reflected second in-phase and said reflected out-of-phase signals at said second circuit element to produce a combined signal; and

in a power amplification mode;

connecting said isolated port of said first circuit element to ground by said first switch;

connecting said isolated port of said second circuit element to ground by said second switch;

splitting said input signal into said in-phase signal and said out-of-phase signal using said first circuit element;

amplifying said in-phase signal using said first power amplifier;

amplifying said out-of-phase signal using said second power amplifier;

combining said amplified in-phase and said out-of-phase signals at said second circuit element to produce a combined output signal;

receiving said input signal and amplifying said input signal using a driver stage;

controlling said first switch and said second switch using a bias and control circuit; and

biasing said driver stage, said first amplifier, and said second amplifier using said bias and control circuit.

32. In a power amplifier circuit arrangement comprising a driver amplifier receiving an input signal and producing an amplified signal, a first circuit element which receives said amplified input signal and produces an in-phase signal and an out-of-phase signal, a first power amplifier connected so a first output of said first circuit element, a second power amplifier connected to a second output of said first circuit element, a first switch alternately routing said input signal to said driver amplifier or a bypass path, a second circuit element having a first port connected to an output of said first power amplifier and a-second port connected to an output of said second power amplifier, said second circuit element having a grounded isolated port, a second switch alternately connecting an isolated port of said first circuit element between ground and said bypass path, a method of bypassing said driver amplifier comprising:

in a driver amplifier bypass mode;

routing said input signal to said bypass path using said first switch;

connecting said isolated port of said first circuit element to said bypass path via said second switch;

splitting said input signal into said in-phase signal and said out-of-phase signal using said first circuit element;

amplifying said in-phase signal using said first power amplifier and transmitting said amplified in-phase signal to said second circuit element;

amplifying said out-of-phase signal using said second power amplifier and transmitting said amplified out-of-phase signal to said second circuit element;

combining said amplified in-phase and said amplified out-of-phase signals at said second circuit element;

transmitting said combined signal to an RF-output port; and

in a power amplification mode;

routing said input signal to said driver amplifier by said first switch;

connecting said isolated port of said first circuit element to ground by said second switch;

splitting said input signal received from said driver amplifier into said in-phase signal and said out-of-phase signal using said first circuit element;

amplifying said in-phase signal using said first power amplifier and transmitting said amplified in-phase signal to said second circuit element;

amplifying said out-of-phase signal using said second power amplifier and transmitting said amplified out-of-phase signal to said second circuit element;

combining said amplified in-phase and said amplified out-of-phase signals at said second circuit element; and

transmitting said combined signal to an RF-output port.

34. In a power amplifier circuit arrangement, comprising a driver stage receiving an input signal and producing an amplified signal, a first circuit element which receives said amplified input signal and produces an in-phase signal and an out-of-phase signal, said first element having a grounded isolated port, a first power amplifier connected to a first output of said first circuit element, a second power amplifier connected to a second output of said first circuit element, a second circuit element having a first port connected to an output of said first power amplifier and a second port connected to an output of said second power amplifier, said second circuit element having an isolated port and said second circuit element producing an output signal, a signal processing element which couples said input signal with said output signal and produces a distortion compensation signal in a distortion compensation path, a switch alternately connecting said isolated port of said second circuit element between ground and a distortion compensation path, a method of providing distortion compensation comprising:

coupling said signal processing element to said input signal and said output signal;

producing a distortion compensation signal corresponding to said input signal and said output signal, said distortion compensation signal generated to cancel distortion caused by said first and second amplifiers;

connecting said distortion compensation path from said signal processing element to said second circuit element using said switch;

inserting said distortion compensation signal into said second circuit element; and

canceling distortion within said input signal using said distortion compensation signal.

35. The method of bypassing the driver stage of claim 34, further comprising:

controlling said switch using a bias and control circuit; and

biasing said driver amplifier, said first amplifier, and said second amplifier using said bias and control circuit.