Frequency synthesizer circuit

• US 6,806,782 B2
• Filed: 04/21/2003
• Issued: 10/19/2004
• Est. Priority Date: 05/20/2002
• Status: Expired due to Term

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Fujitsu Limited
• Inventors: Nagata, Kimihiko, Motoyoshi, Toshiro
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US10/419,206
• Publication Number:
  US 20030214360A1
• Time in Patent Office: 547 Days
• Field of Search: 331/1.A, 331/8, 331/14, 331/17, 331/18, 331/25, 331/34, 331/44, 327/156-159
• US Class Current: 331/44
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

The frequency synthesizer circuit includes a phase-locked loop (PLL) circuit, a voltage controlled oscillator (VCO), a low pass filter (LPF), an input terminal for providing serial data provided from the exterior to the PLL circuit, an output terminal for providing an oscillation signal provided the VCO, and a testing unit providing a testing voltage with a binary value to the VCO, wherein, the PLL circuit, the VCO, the LPF, and the testing unit are mounted on a single chip, and usability of the frequency synthesizer circuit is determined based on the oscillation signal provided from the VCO via said output terminal according to the testing voltage with a binary value provided from said testing unit.

Claims

1. A frequency synthesizer circuit comprising:

a phase-locked loop circuit;

a voltage controlled oscillator;

a low pass filter;

an input terminal for providing serial data provided from the exterior to said phase-locked loop circuit;

an output terminal for providing an oscillation signal provided from said voltage controlled oscillator; and

a testing unit providing a testing voltage with a binary value to said voltage controlled oscillator, wherein,

said phase-locked loop circuit, said voltage controlled oscillator, said low pass filter, and said testing unit are mounted on a single chip; and

usability of said frequency synthesizer circuit is determined based on the oscillation signal provided from said voltage controlled oscillator via said output terminal according to the testing voltage with a binary value provided from said testing unit.

2. The frequency synthesizer circuit as claimed in claim 1, wherein:

said testing unit is provided between said low pass filter and said voltage controlled oscillator; and

said testing unit provides the testing voltage with a binary value based on a control signal included in the serial data provided from said phase-locked loop circuit.

3. The frequency synthesizer circuit as claimed in claim 1, wherein:

said testing unit is provided in said phase-locked loop circuit and said low pass filter is configured as a passive filter, wherein

the testing voltage with a binary value provided from said testing unit is provided to said voltage controlled oscillator via said low pass filter.

4. The frequency synthesizer circuit as claimed in claim 1, wherein:

said voltage controlled oscillator provides the oscillation signal corresponding to a frequency band of a plurality of channels;

said testing unit switches a channel of said voltage controlled oscillator based on a channel selection signal provided from said phase-locked loop circuit; and

usability of said frequency synthesizer circuit is determined based on the oscillation signal provided from said voltage controlled oscillator via said output terminal according to the testing voltage with a binary value provided from said testing unit.

5. The frequency synthesizer circuit as claimed in claim 1, wherein:

said phase-locked loop circuit comprises a divider counter to divide a frequency of the oscillation signal provided from said voltage controlled oscillator by counting pulses of the oscillation signal and an output terminal, wherein

the divided oscillation signal is provided from said output terminal.

6. A frequency synthesizer circuit comprising:

a voltage controlled oscillator;

a phase-locked loop circuit receiving an oscillation signal provided from said voltage controlled oscillator and a given signal in order to generate a phase difference signal by detecting a phase difference between the oscillation signal and the given signal;

a testing unit providing a predetermined testing voltage to said voltage controlled oscillator, wherein

said phase-locked loop circuit further receives serial data provided from the exterior in order to provide a control signal to said testing unit;

said testing unit provides the predetermined testing voltage according to the control signal provided from said phase-locked loop circuit; and

said voltage controlled oscillator provides the oscillation signal based on the phase difference signal provided from the phase-locked loop circuit in a normal operation mode and provides the oscillation signal based on the predetermined testing voltage provided from said testing unit in a testing operation mode.

7. The frequency synthesizer circuit as claimed in claim 6, said frequency synthesizer circuit further comprising a low pass filter to be inserted between said phase-locked loop circuit and said testing unit.

8. The frequency synthesizer circuit as claimed in claim 6, wherein:

said voltage controlled oscillator provides the oscillation signal having an oscillation frequency corresponding to any one of a plurality of frequency bands;

said testing unit provides a testing voltage with a different value to said voltage controlled oscillator according to the control signal provided from said phase-locked loop circuit; and

said voltage controlled oscillator provides said oscillation signal having the oscillation frequency corresponding one of the plurality of frequency bands based on the testing voltage with a different value provided from said testing unit.