Quadrature hybrid and improved vector modulator in a chip scale package using same
First Claim
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1. A circuit functioning as a quadrature hybrid comprising;
- a first spiral inductor and a second spiral inductor;
a first output and a second output, an insulating layer disposed between said first spiral inductor and said second spiral inductor, wherein said first spiral inductor and said second spiral inductor and said insulating layer are positioned relative to each other to create an intrinsic capacitance, said intrinsic capacitance selected in relation to said first and second inductors to cause said second output to be approximately ninety degrees different in phase to said first output.
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Abstract
In accordance with the present invention, a quadrature hybrid circuit is provided comprising a first spiral inductor and a second spiral inductor separated by an insulating layer to provide all necessary capacitances intrinsically. Further, a vector modulator circuit is provided that incorporates a plurality of quadrature hybrid circuits on a MMIC contained within a chip scale package.
98 Citations
18 Claims
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1. A circuit functioning as a quadrature hybrid comprising;
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a first spiral inductor and a second spiral inductor;
a first output and a second output, an insulating layer disposed between said first spiral inductor and said second spiral inductor, wherein said first spiral inductor and said second spiral inductor and said insulating layer are positioned relative to each other to create an intrinsic capacitance, said intrinsic capacitance selected in relation to said first and second inductors to cause said second output to be approximately ninety degrees different in phase to said first output. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
wherein said trace length, said width, and said spacing are chosen to provide a predetermined capacitance. -
3. A circuit as set forth in claim 1, wherein said first spiral inductor and said second spiral inductor are aligned.
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4. A circuit as set forth in claim 1, further comprising:
a third output terminated to ground via a 50 ohm termination.
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5. A circuit as set forth in claim 1, wherein said first spiral inductor, said second spiral inductor, and said insulating layer are contained on a Monolithic Microwave Integrated Circuit.
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6. A circuit as set forth in claim 1, wherein said insulating layer comprises Silicon Nitride.
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7. A circuit as set forth in claim 1, wherein the overall length and width dimensions of said first spiral inductor and said second spiral inductor are each approximately 200 um×
- 200 um.
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8. A circuit as set forth in claim 1, wherein the surface area of said first spiral inductor and said second spiral inductor are controlled to result in a specific intrinsic capacitance, said surface area is determined according to the following parameters:
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9. A circuit as set forth in claim 8, wherein said first spiral inductor and said second spiral inductor each further comprise a spiral trace having a trace length, a trace width, and a spacing between the lines of said trace relative to each other,
wherein said trace length, said width, and said spacing are chosen to provide a predetermined capacitance.
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10. A circuit for performing vector modulation, said circuit encapsulated within a chip scale package, comprising:
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an MMIC, said MMIC comprising;
an input quadrature hybrid;
an output power combiner;
a first quadrature hybrid and a second quadrature hybrid, wherein said first and said second hybrids each comprise;
a first spiral inductor and a second spiral inductor;
an insulating layer disposed between said first spiral inductor and said second spiral inductor, wherein said first spiral inductor and said second spiral inductor and said insulating layer are positioned relative to each other to create an intrinsic capacitance; and
a plurality of terminating elements. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
an input pin for accepting a first RF signal; and
,an output pin for outputting a second RF signal, said second signal being the result of said first RF signal after the vector modulation process is performed.
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18. A circuit as set forth in claim 10, wherein said input quadrature hybrid divider further comprises:
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a three port power divider;
a first and a second lead/lag filter, said first filter having a leading phase shift of 45 degrees and said second filter having a lagging phase shift of 45 degrees.
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Specification