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Line card for supporting circuit and packet switching

  • US 6,807,167 B1
  • Filed: 03/08/2000
  • Issued: 10/19/2004
  • Est. Priority Date: 03/08/2000
  • Status: Expired due to Term
First Claim
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1. A line card comprising:

  • a plurality of connection points for connecting to communication devices having a plurality of communication protocols;

    a first set of the plurality of connection points connected to a time division multiplex bus on the line card;

    a synchronous to asynchronous converter also connected to the time division multiplex bus;

    a processor group connected to the time division multiplex bus in order to control a flow of time division multiplexed information to and from the first set of connection points;

    a second set of the plurality of connection points connected to a PCI bus on the line card;

    a first bridge having a first port connected to the PCI bus on the line card;

    the first bridge having a second port connected to a central bus on the line card;

    the central bus connected to the processor group to control a flow of information to and from the PCI bus;

    the central bus connected through a backplane bridge to a connection point with a backplane PCI bus;

    a third set of the plurality of connection points connected to an asynchronous transfer mode output bus on the line card;

    the asynchronous transfer mode output bus connected to an asynchronous transfer mode switch on the line card;

    the asynchronous transfer mode switch connected through a bus interface to a connection point with a backplane asynchronous transfer mode bus;

    the asynchronous transfer mode switch connected to the synchronous-asynchronous converter by a bus; and

    the asynchronous transfer mode switch connected to two universal test and operations interfaces for ATM (UTOPIA) portions of the processor group by two asynchronous transfer mode switch buses;

    wherein time division multiplexed information received at one of the first set of connection points is communicated to the synchronous-asynchronous converter where the time division multiplexed information is converted into asynchronous transfer mode information, then the information is communicated to the asynchronous transfer mode switch from which the asynchronous transfer mode information is communicated by the asynchronous transfer mode output bus to the third set of the plurality of connection points.

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