High-k gate dielectric with uniform nitrogen profile and methods for making the same

• US 6,809,370 B1
• Filed: 07/31/2003
• Issued: 10/26/2004
• Est. Priority Date: 07/31/2003
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Quevedo-Lopez, Manuel, Visokay, Mark R., Chambers, James J., Colombo, Luigi, Rotondaro, Antonio L. P.
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Huynh, Andy
• Application Number:
  US10/632,230
• Time in Patent Office: 453 Days
• US Class Current: 257/310
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

High-k transistor gate structures and fabrication methods therefor are provided, wherein a gate dielectric interface region near a semiconductor substrate is provided with very little or no nitrogen, while the bulk high-k dielectric is provided with a uniform nitrogen concentration.

Claims

1. A gate structure for a transistor in a semiconductor device, the gate structure comprising:

a dielectric structure formed over a semiconductor body, the dielectric structure comprising;

a bulk portion comprising a high-k dielectric material, the high-k dielectric material of the bulk portion comprising a nitrogen concentration of about 3 atomic percent or more and a nitrogen concentration variation of about 4 percent or less; and

an interface portion comprising a dielectric material between the bulk portion and the semiconductor body, the interface portion having a nitrogen concentration of about 3 atomic percent or less; and

a gate electrode structure comprising a conductive material formed over the bulk portion of the dielectric structure.

2. The gate structure of claim 1, wherein the high-k dielectric material of the bulk portion comprises a nitrogen concentration of about 40 atomic percent or less.

3. The gate structure of claim 2, wherein the high-k dielectric material of the bulk portion comprises a nitrogen concentration variation of about 3 percent or less.

4. The gate structure of claim 3, wherein the high-k dielectric material of the bulk portion is a metal silicon oxynitride, and wherein the metal is selected from the group consisting of Zr, Hf, La, Y, Gd, Eu, Pr, and Ce.

5. The gate structure of claim 4, wherein the high-k dielectric material of the bulk portion is HfSiON.

6. The gate structure of claim 1, wherein the high-k dielectric material of the bulk portion is a metal silicon oxynitride, and wherein the metal is selected from the group consisting of Zr, Hf, La, Y, Gd, Eu, Pr, and Ce.

7. The gate structure of claim 6, wherein the high-k dielectric material of the bulk portion is HfSiON.

8. The gate structure of claim 1, wherein the high-k dielectric material of the bulk portion comprises a nitrogen concentration variation of about 3 percent or less.

9. The gate structure of claim 1, wherein the interface portion of the dielectric structure is about 3 monolayers thick or less.

10. A gate dielectric structure in a semiconductor device, the gate dielectric structure comprising:

a bulk portion comprising a high-k dielectric material, the high-k dielectric material of the bulk portion comprising a nitrogen concentration of about 3 atomic percent or more and a nitrogen concentration variation of about 4 atomic percent or less; and

an interface portion comprising a dielectric material between the bulk portion and a semiconductor body, the interface portion having a nitrogen concentration of about 3 atomic percent or less.

11. The gate structure of claim 10, wherein the interface portion of the dielectric structure is about 3 monolayers thick or less.

12. The gate dielectric structure of claim 10, wherein the high-k dielectric material of the bulk portion comprises a nitrogen concentration of about 40 atomic percent or less.

13. The gate dielectric structure of claim 10, wherein the high-k dielectric material of the bulk portion comprises a nitrogen concentration variation of about 3 percent or less.

14. The gate dielectric structure of claim 10, wherein the high-k dielectric material of the bulk portion is a metal silicon oxynitride, and wherein the metal is selected from the group consisting of Zr, Hf, La, Y, Gd, Eu, Pr, and Ce.

15. The gate dielectric structure of claim 14, wherein the high-k dielectric material of the bulk portion is HfSiON.