Low-noise CMOS active pixel sensor for imaging arrays with high speed global or row reset
First Claim
1. An active-pixel sensor circuit having a photodetector, an access transistor, a reset transistor and an amplifier transistor, the circuit comprising:
- a feedback capacitor connected between a node and a drain of the amplifier transistor, the node formed by the photodetector and a gate of the amplifier transistor;
a column buffer connected to the access transistor via a column bus; and
wherein the feedback capacitor has a capacitance within the range of approximately 0.1-15 fF.
8 Assignments
0 Petitions
Accused Products
Abstract
An active-pixel low-noise imaging system for implementation in CMOS or in other semiconductor fabrication technologies uses three transistors and a single capacitance per pixel. The first transistor serves as a reset and a transimpedance amplifier to facilitate high impedance and suppress reset noise without requiring expensive on-chip or off-chip memory. The second transistor is an access MOSFET used to read the signal from each pixel and multiplex the signal outputs from an array of pixels. The third MOSFET resets the detector after the integrated signal has been read. Since the detector sense node is “pinned” by the feedback amplifier, reset noise is reduced to that generated by the much smaller feedback capacitance. In addition, by using a small but well-defined feedback capacitor, an amplifier with a narrow bandwidth can be used, provided its unity-gain frequency is sufficient. Since the pixel-base amplifier'"'"'s output capacitance is far smaller than the bus capacitance, the total energy consumed during reset is very small and overall power consumption is kept at a level consistent with battery-powered operation.
-
Citations
26 Claims
-
1. An active-pixel sensor circuit having a photodetector, an access transistor, a reset transistor and an amplifier transistor, the circuit comprising:
-
a feedback capacitor connected between a node and a drain of the amplifier transistor, the node formed by the photodetector and a gate of the amplifier transistor;
a column buffer connected to the access transistor via a column bus; and
wherein the feedback capacitor has a capacitance within the range of approximately 0.1-15 fF. - View Dependent Claims (2, 3, 4)
-
-
5. An active-pixel sensor circuit having a photodetector, an access transistor, a reset transistor and an amplifier transistor, the circuit comprising:
-
a feedback capacitor connected between a node and a drain of the amplifier transistor, the node formed by the photodetector and a gate of the amplifier transistor;
a column buffer connected to the access transistor via a column bus; and
wherein the feedback capacitor has a capacitance of approximately 12.6 fF.- View Dependent Claims (6, 7, 8, 9, 10, 11)
-
-
12. An active-pixel sensor circuit having a photodetector, an access transistor, a reset transistor and an amplifier transistor, the circuit comprising:
-
a feedback capacitor connected between a node and a drain of the amplifier transistor, the node formed by the photodetector and a gate of the amplifier transistor;
a column buffer connected to the access transistor via a column bus; and
wherein the feedback capacitor comprises a gate-drain capacitance of the amplifier transistor.
-
-
13. An active pixel sensor circuit comprising:
-
a photodetector element having a node;
a reset transistor having a source connected to the node and a gate connected to a reset bus;
an amplifier transistor having a source connected to the photodetector, a gate connected to the node, and a drain connected to a drain of the reset transistor;
a feedback capacitor connected between the gate and drain of the amplifier transistor;
a transfer transistor having a drain connected to the drain of the amplifier transistor, a gate connected to a transfer signal bus, and a source connected to a column bus;
a column buffer connected to the column bus; and
wherein the feedback capacitor has a capacitance within the range of approximately 0.1-15. - View Dependent Claims (14, 15, 16, 26)
-
-
17. An active pixel sensor circuit comprising:
-
a photodetector element having a node;
a reset transistor having a source connected to the node and a gate connected to a reset bus;
an amplifier transistor having a source connected to the photodetector, a gate connected to the node, and a drain connected to a drain of the reset transistor;
a feedback capacitor connected between the gate and drain of the amplifier transistor;
a transfer transistor having a drain connected to the drain of the amplifier transistor, a gate connected to a transfer signal bus, and a source connected to a column bus;
a column buffer connected to the column bus; and
wherein the feedback capacitor has a capacitance of approximately 12.6 fF. - View Dependent Claims (18, 19, 20)
-
-
21. An active pixel sensor circuit comprising:
-
a photodetector element having a node;
a reset transistor having a source connected to the node and a gate connected to a reset bus;
an amplifier transistor having a source connected to the photodetector, a gate connected to the node, and a drain connected to a drain of the reset transistor;
a feedback capacitor connected between the gate and drain of the amplifier transistor;
a transfer transistor having a drain connected to the drain of the amplifier transistor, a gate connected to a transfer signal bus, and a source connected to a column bus;
a column buffer connected to the column bus; and
wherein the feedback capacitor comprises a gate-drain capacitance of the amplifier transistor. - View Dependent Claims (22, 23, 24)
-
-
25. An active pixel sensor circuit comprising:
-
a photodetector element having a node;
a reset transistor having a source connected to the node and a rate connected to a reset bus;
an amplifier transistor having a source connected to the photodetector, a gate connected to the node, and a drain connected to a drain of the reset transistor;
a feedback capacitor connected between the pate and drain of the amplifier transistor;
a transfer transistor having a drain connected to the drain of the amplifier transistor, a gate connected to a transfer signal bus, and a source connected to a column bus;
a column buffer connected to the column bus; and
wherein the feedback capacitor comprises a gate-drain capacitance of the amplifier transistor.
-
Specification