MEMS driver

• US 6,809,851 B1
• Filed: 10/24/2001
• Issued: 10/26/2004
• Est. Priority Date: 10/24/2001
• Status: Expired due to Fees

• Current Assignee: Decicon Incorporated
• Original Assignee: Decicon Incorporated
• Inventors: Gurcan, Hakan Ates
• Primary Examiner(s): Mack, Ricky
• Assistant Examiner(s): Thomas, Brandi N
• Application Number:
  US10/082,822
• Time in Patent Office: 1,098 Days
• Field of Search: 359/290, 359/291, 359/298, 359/214, 359/224, 359/296, 359/295, 359/230, 359/239, 359/297, 359/293, 427/534, 427/162
• US Class Current: 359/290
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means

Abstract

A MEMS driver includes a digital control block receiving an external digital control word and generating control signals for use in controlling a reference current source. The reference current source generates a reference current to a high voltage output stage in response to the digital control signals. The high voltage output stage generates an output current to an integrator in response to the reference current. The integrator provides an output voltage to a drive electrode that electrostically controls the position of the MEMS structure.

Claims

1. A method for operating a circuit adapted to electrostatically drive the MEMS structure, the method comprising:

applying a first voltage to a drive electrode that electrostatically drives the MEMS structure;

generating a first current in response to a first digital control word;

integrating the first current to generate a first difference voltage by which the first voltage is changed thereby to generate a second voltage, said first digital control word specifying whether said first difference voltage is greater than, smaller than or equal to 0 volts;

applying the second voltage to the drive electrode that electrostatically drives the MEMS structure;

generating a second current in response to a second digital control word;

integrating the second current to generate a second difference voltage by which the second voltage is changed thereby to generate a third voltage, said second digital control word specifying whether said second difference voltage is greater than, smaller than or equal to 0 volts;

applying the third voltage to the drive electrode that electrostatically drives MEMS, structure, wherein the first voltage is different from the second voltage.

2. The method of claim 1, wherein the driver circuit fits within a footprint of the MEMS structure to be driven by the driver circuit.

4. The method of claim 2, wherein the MEMS structure is a micromirror.

5. The method of claim 1, wherein the first digital control word includes one or more bits representing an integration duration and said generating the first current comprises generating the first current for the integration duration.

6. The method of claim 5, wherein the first digital control word further includes a bit representing an integration direction and said generating the first current further comprises generating the first current in the integration direction.

7. The method of claim 6, wherein the first digital control word further includes one or more bits representing an integration current level and said generating the first current further comprises generating the first current at the integration current level.

3. A method for operating a driver circuit that electrostatically drives a MEMS structure, comprising;

generating a first output current in response to a first digital control word; and

integrating the first output current to increase or decrease a first voltage by an amount and in a direction controlled by the first digital control word to obtain a second voltage which can be coupled to a drive electrode that electrostatically drives the MEMS structure;

wherein the driver circuit fits within a footprint of the MEMS structure, wherein the footprint is at most 1.2 by 1.2 mm².

8. A method for operating a driver circuit that electrostatically drives a MEMS structure, comprising:

receiving a first digital control word including information relating to a first integration duration, a first integration direction, and a first integration current level, the first digital control word representing a change to a first voltage across an integrate-and-hold capacitor;

in response to the first digital control word, generating a first reference current in the first integration direction, at the first integration current level, and for the first integration duration; and

in the response to the first reference current, generating a first output current in the first integration direction, at a level scaled relative to the first integration current level, and for the first integration duration;

supplying the first output current to the integrate-and-hold capacitor, wherein a second voltage develops across the integrate-and-hold capacitor and can be coupled to a drive electrode that electrostatically drives the MEMS structure.

9. The method of claim 8, wherein the driver circuit fits within a footprint of the MEMS structure to be driven by the driver circuit.

10. The method of claim 9, wherein the structure is a micromirror.

11. The method of claim 9, further comprising;

receiving a second digital control word including information relating to a second integration duration, a second integration direction, and a second integration current level, the second digital code word representing a change to the second voltage across the integrate-and-hold capacitor;

in response to the second digital control word, generating a second reference current in the second integration direction, at the second integration current level, and for the second integration duration;

in response to the second reference current, generating a second output current in the second integration direction, at a level scaled relative to the second integration current level, and for the second integration duration; and

supplying the second output current to the integrate-and-hold capacitor, wherein a third voltage develops across the integrate-and-hold capacitor and can be coupled to the drive electrode.

12. The method of claim 8, wherein said generating the first output reference current comprises:

in response to receiving the information relating to the first integration duration, generating an active count signal during the first integration duration;

in response to receiving the active count signal and the information relating to the first integration current level, enabling a combination of output branches in a first current mirror to generate an internal reference current;

in response to receiving the active count signal and the information relating to the integration direction, allowing the enabling of a first plurality of output branches or a second plurality of output branches in a second current mirror, the second current mirror including a reference branch receiving the internal reference current; and

in response to receiving the information relating to the first integration current level, enabling a combination of the output branches of the first or the second plurality of output branches allowed by the active count signal and the information relating to the integration direction to generate the output reference current.

13. The method of claim 8, wherein said generating the first output current comprises:

supplying the first current to a first current mirror, wherein the first current mirror generates an internal reference current scaled relative to the first reference current; and

supplying the internal reference current to a second current mirror, wherein the second current mirror generates the first output current in a down direction scaled relative to the internal reference current.

14. The method of claim 13, wherein the second current mirror comprises an output branch including a high voltage transistor comprising a source coupled to a high voltage supply.

15. The method of claim 13, further comprising supplying a small current to the first current mirror when the reference current is zero.

16. The method of claim 8, wherein said generating the first output current comprises:

supplying the first reference current to a third current mirror, wherein the third current mirror generates a third internal reference current sealed relative to the first reference current;

supplying the first internal reference current to a fourth current mirror, wherein the fourth current mirror generates a fourth internal reference current scaled relative to the first internal reference current; and

supplying the fourth reference current to a fifth current mirror, wherein the fifth current mirror generates the first output current in an up direction scaled relative to the fourth internal reference current.

17. The method of claim 16, wherein each of the fourth and the fifth current mirrors comprises an output branch including a high voltage transistor having a source coupled to a high voltage supply.

18. The method of claim 16, further comprising supplying a small current to the third current mirror when the reference current is zero.