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System and method for comparison and compensation of delay variations between fine delay and coarse delay circuits

  • US 6,812,760 B1
  • Filed: 07/02/2003
  • Issued: 11/02/2004
  • Est. Priority Date: 07/02/2003
  • Status: Active Grant
First Claim
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1. A compensation circuit for an adjustable delay circuit having fine and coarse delay circuits, comprising:

  • a reference delay circuit having an input at which an input clock signal is applied and an output at which a reference delayed clock signal is provided, the reference delay circuit having a reference fine delay component and a reference coarse delay component, the time delay of the coarse delay component greater than the time delay of the fine delay component and having an expected relationship with respect to the time delay of the fine delay component;

    an adjustable fine delay circuit having a control terminal at which a control signal is applied, and further having an input at which the input clock signal is applied and an output at which a variable delayed clock signal is provided, the adjustable fine delay circuit having a time delay adjusted according to the control signal;

    a phase detector having a first input coupled to the output of the reference coarse delay component and a second input coupled to the output of the adjustable fine delay circuit to compare the phase relationship of the reference delayed clock signal and the variable delayed clock signal, the phase detector generating an output signal indicative of the phase relationship;

    a feedback circuit coupled to the phase detector to generate a compensation signal indicative of the variance from the expected relationship between the time delay of the coarse and fine delay components based on the output signal from the phase detector; and

    a stabilization circuit coupled to the feedback circuit and the adjustable fine delay circuit and configured to generate a stabilized compensation signal provided to the adjustable fine delay circuit as the control signal in response to the compensation signal from the feedback circuit, the stabilization circuit including at least one stabilization stage having a flip-flop coupled to an input of a NOR gate and an inverter coupled to the output of the NOR gate.

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