Buried, fully depletable, high fill factor photodiodes

• US 6,815,791 B1
• Filed: 12/14/1999
• Issued: 11/09/2004
• Est. Priority Date: 02/10/1997
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Dierickx, Bart
• Primary Examiner(s): Thomas, Tom
• Assistant Examiner(s): Lee, Eugene
• Application Number:
  US09/460,630
• Time in Patent Office: 1,792 Days
• Field of Search: 257/83, 257/222, 257/225, 257/184, 257/461, 257/448, 257/447, 257/460, 257/462, 257/446, 257/233, 257/232, 257/292, 257/458, 257/215, 438/60, 438/75, 438/144
• US Class Current: 257/461
• CPC Class Codes: H01L 27/1443 with at least one potential jump or surface barrier
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 31/0352 characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

A semiconductor detector of electromagnetic radiation which utilizes a dual-purpose electrode which extends significantly beyond the edge of a photodiode. This configuration reduces the sensitivity of device performance on small misalignments between manufacturing steps while reducing dark currents, kTC noise, and “ghost” images. The collection-mode potential of the dual-purpose electrode can be adjusted to achieve charge confinement and enhanced collection efficiency, reducing or eliminating the need for an additional pinning layer. Finally, the present invention enhances the fill factor of the photodiode by shielding the photon-created charge carriers formed in the substrate from the potential wells of the surrounding circuitry.

Claims

1. A CMOS pixel structure comprising:

a semiconductor substrate with dopants of a first conductivity type at a first concentration density, and with an insulating layer at its surface;

a collection region with dopants of a second conductivity type which is opposite the first conductivity type at a second concentration density, formed in the surface region of the semiconductor substrate;

a barrier region of the first conductivity type in the substrate, with a concentration density of dopants being higher than the concentration density of dopants in the substrate;

a dual-purpose electrode formed on the insulating layer, extending over both the surface of at least part of the collection region and over at least part of the substrate, the dual-purpose electrode being intended to be driven by a first voltage that causes an electrostatic potential which collects in an area of the collection region beneath the dual-purpose electrode charges generated by electromagnetic radiation and by a second voltage, which is higher than the first voltage, for transferring the charges from the collection region into a detection region, and

the pixel structure being an active pixel structure having an amplifier integrated in the pixel structure and coupled to the detection region for amplifying the collected charge.

2. The pixel structure recited in claim 1 wherein said barrier region is extending at least partly under the dual-purpose electrode.

3. The pixel structure recited in claim 1 further comprising a detection region with dopants of the second conductivity type at a third concentration density, formed in the surface region of the semiconductor substrate and not bordering the collection region and being connected to read-out electronics.

4. The pixel structure recited in claim 1, wherein the collection region forms a junction with the semiconductor substrate.

5. The pixel structure recited in claim 4, wherein the junction formed is a photodiode.

6. The pixel structure recited in claim 1, wherein the surface regions of the semiconductor substrate beyond the collection region are barrier regions which have dopants of the first conductivity type at a concentration density larger that the concentration density of the semiconductor substrate and read-out electronics are formed within shielding regions.

7. The pixel structure recited in claim 6, wherein at least part of the charge carriers that are generated in the semiconductor substrate underneath the shielding regions are collected by the collection region.

8. The pixel structure recited in claim 1, wherein a pinning region with dopants of the first conductivity type at a fourth concentration density is within the surface region.

9. The pixel structure recited in claim 8, wherein the pinning region is not covered by the dual-purpose electrode.

10. The pixel structure recited in claim 9, wherein the pinning region is aligned with the dual-purpose electrode, and extends along the collection region.

11. The pixel structure according to claim 1, wherein the barrier region substantially impedes the diffusion of charges to said detection region.