Bandgap reference circuit

• US 6,815,941 B2
• Filed: 02/05/2003
• Issued: 11/09/2004
• Est. Priority Date: 02/05/2003
• Status: Expired due to Term

• Current Assignee: Invensas Corporation
• Original Assignee: United Memories Incorporated (ProMOS Technologies, Inc.), Sony Corporation (Sony Group Corp.)
• Inventors: Butler, Douglas Blaine
• Primary Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US10/358,668
• Publication Number:
  US 20040150381A1
• Time in Patent Office: 643 Days
• Field of Search: 323/313, 323/314, 323/315, 323/316, 323/901
• US Class Current: 323/313
• CPC Class Codes: G05F 3/30 Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities G05F3/26 takes precedence
• CPC Class Codes: Y10S 323/901 Starting circuits

Abstract

A bandgap reference circuit includes a current-voltage mirror circuit having first, second, third, and fourth nodes, a transistor having a current path coupled between a source of supply voltage and the first node, a current mirror portion having an input coupled to the first node and a control terminal coupled to the fourth node, a serially coupled first resistor and first diode coupled between the output of the current mirror portion and ground, a serially coupled second resistor and second diode coupled between the third node and ground, a third diode coupled between the second node and ground, and a differential amplifier having a first input coupled to the fourth node, a second input coupled to the output of the current mirror portion for generating a bandgap reference voltage, and an output coupled to the gate of the transistor.

Claims

1. A bandgap reference circuit comprising:

a current-voltage mirror circuit having first, second, third, and fourth nodes;

a transistor having a gate, and a current path coupled between a source of supply voltage and the first node;

a current mirror portion having an input coupled to the first node, a control terminal coupled to the fourth node, and an output;

a serially coupled first resistor and first diode coupled between the output of the current mirror portion and ground;

a serially coupled second resistor and second diode coupled between the third node and ground;

a third diode coupled between the second node and ground; and

a differential amplifier having a first input coupled to the fourth node, a second input coupled to the output of the current mirror portion for generating a bandgap reference voltage, and an output coupled to the gate of the transistor.

2. A bandgap circuit as in claim 1 in which the current-voltage mirror comprises:

a PMOS current mirror having an input coupled to the fourth node, an output, and a source terminal coupled to the first node; and

an NMOS current mirror having an input coupled to the output of the PMOS current mirror, an output coupled to the fourth node, a first source terminal forming the second node, and a second source terminal forming the third node.

3. A bandgap circuit as in claim 1 in which the current mirror portion comprises a PMOS transistor having a gate forming the control terminal, a drain forming the output, and a source forming the input.

4. A bandgap circuit as in claim 1 in which the differential amplifier comprises:

a PMOS load circuit;

a first NMOS transistor having a gate forming the first input, a drain coupled to the PMOS load circuit, and a source;

a second NMOS transistor having a gate forming the second input, a drain coupled to the PMOS load circuit, and a source; and

a third NMOS transistor having a drain coupled to the sources of the first and second NMOS transistors, a gate for receiving a bias voltage; and

a source coupled to ground.

5. A bandgap circuit as in claim 4 further comprising a bias circuit having an input coupled to the fourth node and an output for generating the bias voltage.

6. A bandgap circuit as in claim 5 in which the bias circuit comprises:

a PMOS transistor having a gate forming the input, a source coupled to the first node, and a drain; and

a diode-connected NMOS transistor having an anode coupled to the drain of the PMOS transistor for generating the bias voltage, and a cathode coupled to ground.

7. A bandgap circuit as in claim 1 further comprising a capacitor coupled between the first node and ground.

8. A bandgap circuit as in claim 7 in which the capacitor comprises a capacitor-connected NMOS transistor.

9. A bandgap circuit as in claim 1 further comprising a start-up circuit coupled to the gate of the transistor, as well as to the first and second inputs and output of the differential amplifier.

10. A bandgap circuit as in claim 9 in which the start-up circuit comprises:

a PMOS transistor having a source coupled to the source of supply voltage, a gate coupled to ground, and a drain;

a first NMOS transistor having a gate coupled to the drain of the PMOS transistor, a source coupled to ground, and a drain coupled to the differential amplifier;

a second NMOS transistor having a gate coupled to the drain of the PMOS transistor, a source coupled to ground, and a drain coupled to the differential amplifier; and

a third NMOS transistor having a drain coupled to the drain of the PMOS transistor, a source coupled to ground, and a gate coupled to the differential amplifier.

11. A bandgap circuit as in claim 1 in which:

the current-voltage mirror comprises a pair of PMOS transistors; and

the current mirror portion comprises a PMOS transistor; and

wherein the size of the PMOS transistors in the current-voltage mirror and the current mirror portion are substantially the same.

12. A bandgap circuit as in claim 1 in which the second and third diodes each comprises diode-connected bipolar PNP transistors having substantially the same emitter size.

13. A bandgap circuit as in claim 12 in which the first diode comprises a diode-connected bipolar PNP transistor having substantially ten times the emitter area of the second and third diodes.

14. A bandgap circuit as in claim 12 in which the first diode comprises a diode-connected bipolar PNP transistor including ten parallel transistors each having substantially the same emitter area of the second and third diodes.

15. A bandgap circuit as in claim 1 in which the first resistor has substantially 10.5 times the resistance of the second resistor.

16. A bandgap circuit as in claim 1 in which the resistance of the first resistor is substantially equal to 630K ohms.

17. A bandgap circuit as in claim 1 in which the resistance of the second resistor is substantially equal to 60K ohms.

18. A bandgap reference circuit comprising:

a current-voltage mirror circuit for generating a reference voltage;

a current mirror portion coupled to the current-voltage mirror circuit;

a serially coupled first resistor and first diode coupled to the current mirror portion;

a serially coupled second resistor and second diode coupled to the current-voltage mirror circuit;

a third diode coupled to the current-voltage mirror circuit; and

a differential amplifier having a first input coupled to the current-voltage mirror circuit and an output coupled to the current-voltage mirror circuit through an intervening transistor, and a second input coupled to the current mirror portion for generating a band gap reference voltage.

19. A bandgap reference circuit as in claim 18 in which the resistance of the first resistor is larger than the second resistor.

20. A bandgap reference circuit as in claim 18 in which the size of the first diode is large than the size of the second diode.