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Frequency hopping spread spectrum decoder

  • US 6,816,538 B2
  • Filed: 06/26/2002
  • Issued: 11/09/2004
  • Est. Priority Date: 06/26/2002
  • Status: Active Grant
First Claim
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1. An asynchronous frequency hopping spread spectrum receiver, comprising:

  • an integrated circuit transceiver providing a PLL lock signal and a received signal strength indicator signal; and

    a microcontroller that receives said PLL lock signal and said received signal strength indicator signal, wherein said receiver scans a predetermined list of channels and said microcontroller converts said received signal strength indicator signal for each scanned channel to a digital value representative of said received signal strength indicator signal and stores each said digital value in a received signal strength indicator list, wherein said microcontroller determines a subset of channels to scan for a preamble pattern, said subset of channels being determined from a predetermined number of highest digital values stored in said received signal strength indicator list, wherein said subset of channels are sampled over a predetermined number bit times, and wherein a correlation is performed on a sampled subset of channels to determine the presence of said preamble pattern.

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