Nitride semiconductor element and production method for nitride semiconductor element

• US 6,818,465 B2
• Filed: 04/22/2003
• Issued: 11/16/2004
• Est. Priority Date: 08/22/2001
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Doi, Masato, Oohata, Toyoharu, Okuyama, Hiroyuki, Biwa, Goshi
• Primary Examiner(s): Everhart, Caridad
• Application Number:
  US10/415,010
• Publication Number:
  US 20040048409A1
• Time in Patent Office: 574 Days
• Field of Search: 438/3, 438/44, 438/47, 438/481, 438/22, 438/46, 257/295, 257/103, 257/190, 257/79, 257/96, 257/76, 257/81, 257/99
• US Class Current: 438/22
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01S 2304/12 Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H01S 5/042 Electrical excitation ; Circuits therefor monolithically integrated laser drive components H01S5/0261
• CPC Class Codes: H01S 5/10 Construction or shape of the optical resonator , e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region H01S5/20 takes precedence
• CPC Class Codes: H01S 5/2272 grown by a mask induced selective growth
• CPC Class Codes: H01S 5/3203 on non-planar substrates to create thickness or compositional variations
• CPC Class Codes: H01S 5/32341 blue laser based on GaN or GaP

Abstract

Nitride semiconductor devices and methods of fabricating same are provided. The nitride semiconductor device includes a crystal layer grown into a three-dimensional shape having a side surface portion and an upper layer portion, wherein an electrode layer is formed on the upper layer portion via a high resistance region formed by an undoped gallium nitride layer or the like. Since the high resistance region is provided on the upper layer portion, a current flows so as to bypass the high resistance region of the upper layer portion, to form a current path extending mainly or substantially along the side surface portion while avoiding the upper layer portion, thereby suppressing the flow of a current in the upper layer portion poor in crystallinity.

Claims

1. A nitride semiconductor device comprising a crystal layer grown in a three-dimensional shape that has a side surface portion and an upper layer portion, wherein an electrode layer is formed on the upper layer portion over a high resistance region.

2. The nitride semiconductor device according to claim 1, wherein the side surface portion includes a tilt plane of the crystal layer.

3. The nitride semiconductor device according to claim 1, wherein the upper layer portion is formed into a shape selected from the group consisting of a truncated shape and a planar shape.

4. The nitride semiconductor device according to claim 1, wherein the crystal layer is formed by forming an anti-growth film on a nitride semiconductor layer including a nitride semiconductor substrate, and selectively growing the crystal layer from an opening portion opened in the anti-growth film.

5. The nitride semiconductor device according to claim 1, wherein the crystal layer is formed by selectively removing a portion of a nitride semiconductor layer including a nitride semiconductor substrate, and growing the crystal layer from a remaining portion of the nitride semiconductor layer.

6. The nitride semiconductor device according to claim 1, wherein a bottom surface portion of the crystal layer is formed into a stripe shape.

7. The nitride semiconductor device according to claim 1, wherein a bottom surface portion of said crystal layer is formed into a polygonal shape.

8. The nitride semiconductor device according to claim 1, wherein the crystal layer is formed on a substrate and has a plane parallel to the substrate, the plane parallel to the substrate being tilted at an angle of ±

10°

or less with respect to the C-plane of a wurtzite type crystal structure.

9. The nitride semiconductor device according to claim 1, wherein the side surface portion of the crystal layer is tilted at an angle of ±

10°

or less with respect to a plane of a wurtzite type crystal structure selected from the group consisting of {1,1,−

2,−

2} plane, the {1,−

1,0,1}, the {1,1,−

2,0} plane, and the {1,−

1,0, 0} plane of a wurtzite type crystal structure.

10. The nitride semiconductor device according to claim 1, wherein the high resistance region is formed by an undoped nitride semiconductor layer.

11. The nitride semiconductor device according to claim 1, wherein the high resistance region is formed by a nitride semiconductor layer doped with a p-type impurity.

12. The nitride semiconductor device according to claim 1, wherein the high resistance region is formed by a nitride semiconductor layer doped with an n-type impurity.

13. The nitride semiconductor device according to claim 1, wherein the high resistance region is formed on the upper layer portion over an active layer.

14. The nitride semiconductor device according to claim 1, wherein an active layer is formed on the upper layer portion over the high resistance region.

15. A nitride semiconductor device comprising a crystal layer grown on a nitride semiconductor layer including a nitride semiconductor substrate, the crystal layer comprising a first crystal portion, a second crystal portion wherein the first crystal portion has a greater crystallinity than the second crystal portion, and an electrode layer that is formed on the second crystal portion over a high resistance region.

16. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape having a side surface portion and an upper layer portion, a first conductive region and a second conductive region that are formed on the crystal layer, wherein a resistance value between the first conductive region and the second conductive region on the upper layer portion side is larger than a resistance value between the first conductive region and the second conductive region on the side surface portion side.

17. The nitride semiconductor device according to claim 16, wherein the resistance value between the first conductive region and the second conductive region on the upper layer portion side is 1.5 times or more larger than the resistance value between the first conductive region and the second conductive region on the side surface portion side.

18. The nitride semiconductor device according to claim 16, wherein the resistance value between the first conductive region and the second conductive region on the upper layer portion side is two times or more larger than the resistance value between the first conductive region and the second conductive region on the side surface portion side.

19. A method of fabricating a nitride semiconductor device, the method comprising the steps of:

forming a crystal layer on a nitride semiconductor layer including a nitride semiconductor substrate by selective growth;

continuously forming a high resistance region by changing a crystal growth condition after formation of an upper layer portion of the crystal layer; and

forming an electrode layer after formation of the high resistance region.

20. The method of fabricating a nitride semiconductor device according to claim 19, wherein the step of forming the crystal layer by selective growth comprises forming an anti-growth film on the nitride semiconductor layer, and growing the crystal layer from an opening portion opened in the anti-growth film.

21. The method of fabricating a nitride semiconductor device according to claim 19, wherein the step of forming a crystal layer by selective growth comprises selectively removing a portion of the nitride semiconductor layer, and growing the crystal layer from a remaining portion of the nitride semiconductor layer.

22. The method of fabricating a nitride semiconductor device according to claim 19, wherein the high resistance region is formed so as to provide a top portion of the crystal layer that has a cross-sectional triangular shape.

23. The method of fabricating a nitride semiconductor layer according to claim 19, wherein the high resistance region is formed without doping any impurity to the region.

24. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape having a ridge portion, and an electrode layer that is formed on both the ridge portion and a region extending along the ridge portion over a high resistance region.

25. The nitride semiconductor device according to claim 24, wherein the high resistance region is formed by providing an undoped portion.

26. The nitride semiconductor device according to claim 24, wherein the high resistance region is formed by providing an ion implanted portion formed by ion implantation.

27. The nitride semiconductor device according to claim 24, wherein the high resistance region is formed by selectively irradiating a portion, other than the ridge portion and the region extending along the ridge portion, of a nitride semiconductor layer doped with a p-type impurity with electron beams.

28. The nitride semiconductor device according to claim 24, wherein an upper layer portion of the crystal layer is formed into a shape selected from the group consisting of a truncated shape and a planar shape.

29. The nitride semiconductor device according to claim 24, wherein a bottom surface portion of the crystal layer is formed into a polygonal shape.

30. The nitride semiconductor device according to claim 24, wherein a bottom surface portion of the crystal layer is formed into a stripe shape.

31. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape, and an electrode layer that is formed on both a bottom portion of the crystal layer and a region extending from the bottom portion over a high resistance region.

32. The nitride semiconductor device according to claim 31, wherein the high resistance region is formed by providing an undoped portion.

33. The nitride semiconductor device according to claim 31, wherein the high resistance region is formed by providing an ion implanted portion formed by ion implantation.

34. The nitride semiconductor device according to claim 31, wherein the high resistance region is formed by selectively irradiating a portion, other than a ridge portion and a region extending along the ridge portion, of a nitride semiconductor layer doped with a p-type impurity with electron beams.

35. The nitride semiconductor device according to claim 31, wherein an upper layer portion of the crystal layer is formed into a shape selected from the group consisting of a truncated shape and a planar shape.

36. The nitride semiconductor device according to claim 31, wherein a bottom surface portion of the crystal layer includes a polygonal shape.

37. The nitride semiconductor device according to claim 31, wherein a bottom surface portion of the crystal layer includes a stripe shape.

38. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape, and an electrode layer that is formed on a flat surface portion of the crystal layer other than a ridge portion and a region extending along the ridge portion of the crystal layer.

39. The nitride semiconductor device according to claim 38, wherein an upper layer portion of the crystal layer includes a shape selected from the group consisting of a truncated shape and a planar shape.

40. The nitride semiconductor device according to claim 38, wherein a bottom surface portion of the crystal layer includes a polygonal shape.

41. A nitride semiconductor device according to claim 38, wherein a bottom surface portion of the crystal layer is shaped in a stripe shape.

42. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape, wherein an electrode layer is formed on a flat surface portion of the crystal layer other than a bottom side portion and a region extending along the bottom side portion, of the crystal layer.

43. The nitride semiconductor device according to claim 42, wherein an upper layer portion of the crystal layer includes a shape selected from the group consisting of a truncated shape and a planar shape.

44. The nitride semiconductor device according to claim 42, wherein a bottom surface portion of the crystal layer includes a polygonal shape.

45. The nitride semiconductor device according to claim 42, wherein a bottom surface portion of the crystal layer includes a stripe shape.

46. A nitride semiconductor device comprising a crystal layer grown into a three-dimensional shape having a side surface portion and an upper layer portion, wherein an electrode layer is formed on the side surface portion and not on an upper layer portion.

47. The nitride semiconductor device according to claim 46, wherein the electrode layer is not formed at least a portion of a ridge portion and proximity thereof and a bottom surface portion and proximity thereof of the neighborhood of the side surface portion of the crystal layer.

48. The nitride semiconductor device according to claim 46, wherein an upper layer portion of the crystal layer includes a shape selected from the group consisting of a truncated shape and a planar shape.

49. The nitride semiconductor device according to claim 46, wherein a bottom surface portion of the crystal layer includes a polygonal shape.

50. The nitride semiconductor device according to claim 46, wherein a bottom surface portion of the crystal layer includes a stripe shape.