Method and apparatus for integrated circuit failure analysis

• US 6,819,125 B1
• Filed: 07/23/2003
• Issued: 11/16/2004
• Est. Priority Date: 07/23/2003
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Arrington, Justin R., Green, James E., Paulin, Nicholas E., Kenney, Michael D.
• Primary Examiner(s): Zarneke, David A.
• Assistant Examiner(s): HOLLINGTON, JERMELE M
• Application Number:
  US10/625,450
• Time in Patent Office: 482 Days
• Field of Search: 324/750, 324/756, 324/758, 324/760, 324/765, 324/158.1, 438/14-19, 250/306-307, 298/46
• US Class Current: 324/754.03
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06
• CPC Class Codes: G01R 31/2898 Sample preparation, e.g. removing encapsulation, etching sample preparation in general G01N1/00
• CPC Class Codes: G01R 31/307 of integrated circuits

Abstract

The present invention provides a method and apparatus for detecting and locating a fault in an integrated circuit structure formed in one or more insulating layers deployed on a semiconductor substrate. The apparatus includes a probe tool capable of detecting a fault in the integrated circuit structure, a laser tool capable of forming an electrical connection between the integrated circuit structure and the semiconductor substrate, and a controller coupled to the probe tool and the laser tool, wherein the controller is capable of directing the laser tool to form the electrical connection between the integrated circuit structure and the semiconductor substrate in response to detecting the fault in the integrated circuit structure. The apparatus also includes a source for providing an electrical charge to the integrated circuit structure in response to detecting the fault in the integrated circuit structure and a detector for detecting an electrical charge accumulation in at least a portion of the integrated circuit structure.

Claims

1. An apparatus for detecting and locating a fault in an integrated circuit structure formed in one or more insulating layers deployed on a semiconductor substrate, comprising:

a probe tool capable of detecting a fault in the integrated circuit structure;

a laser tool capable of forming an electrical connection between the integrated circuit structure and the semiconductor substrate;

a controller coupled to the probe tool and the laser tool, wherein the controller is capable of directing the laser tool to form the electrical connection between the integrated circuit structure and the semiconductor substrate in response to detecting the fault in the integrated circuit structure;

a source for providing an electrical charge to the integrated circuit structure in response to detecting the fault in the integrated circuit structure; and

a detector for detecting an electrical charge accumulation in at least a portion of the integrated circuit structure.

2. The apparatus of claim 1, wherein the probe tool is capable of being coupled to at least two locations in the integrated circuit structure.

3. The apparatus of claim 2, wherein the at least two locations in the integrated circuit structure are at least two pads.

4. The apparatus of claim 1, wherein the laser tool is capable of forming the electrical connection between the integrated circuit structure and the substrate by melting a portion of the integrated circuit structure.

5. The apparatus of claim 4, wherein the portion of the integrated circuit structure is a pad.

6. The apparatus of claim 1, wherein the laser tool is capable of forming the electrical connection between the integrated circuit structure and the substrate by melting a portion of the one or more insulating layers.

7. The apparatus of claim 1, wherein the source for providing the electrical charge is a scanning electron microscope.

8. The apparatus of claim 1, wherein the integrated circuit structure is an array of circuit elements.

9. The method of claim 1, wherein the controller is capable of determining location coordinates of the probe tool and directing the laser tool to the determined location coordinates.

10. The method of claim 1, wherein the controller comprises a probe tool controller and a laser tool controller, the probe tool controller capable of providing location coordinates to the laser tool controller.

11. The apparatus of claim 1, wherein the controller is coupled to the source for providing the electrical charge, and wherein the controller is capable of directing the source to the integrated circuit structure.

12. The apparatus of claim 11, wherein the controller comprises an electrical charge source controller, a probe tool controller, and a laser tool controller.

13. The apparatus of claim 12, wherein the laser tool controller is capable of receiving location coordinates from the probe tool controller, and wherein the electrical charge source controller is capable of receiving location coordinates from at least one of the probe tool controller and the laser tool controller.

14. An apparatus for detecting and locating a fault in an integrated circuit structure formed in one or more insulating layers deployed on a semiconductor substrate, comprising:

a probe tool capable of detecting a fault in the integrated circuit structure;

a laser tool capable of forming an electrical connection between the integrated circuit structure and the semiconductor substrate;

a scanning electron microscope; and

a controller coupled to the probe tool, the laser tool, and the scanning electron microscope, wherein the controller is capable of directing the laser tool to form the electrical connection between the integrated circuit structure and the semiconductor substrate in response to detecting the fault in the integrated circuit structure, and wherein the scanning electron microscope is capable of providing an electrical charge to the integrated circuit structure and detecting an electrical charge accumulation in at least a portion of the integrated circuit structure in response to detecting the fault in the integrated circuit structure.

15. The apparatus of claim 14, wherein the controller comprises a probe tool controller capable of determining location coordinates of a pad in the integrated circuit structure.

16. The apparatus of claim 15, wherein the controller comprises a laser tool controller capable of receiving the determined location coordinates from the probe tool controller, and wherein the laser tool controller is capable of directing the laser tool to the determined location coordinates.

17. The apparatus of claim 16, wherein the controller comprises a scanning electron microscope controller capable of receiving the determined location coordinates from the probe tool controller or the laser tool controller, and wherein the scanning electron microscope controller is capable of directing the scanning electron microscope to the integrated circuit structure.

18. A method for detecting and locating faults in an integrated circuit structure formed on a substrate, comprising:

probing the integrated circuit structure to determine if a fault exists in the integrated circuit structure using a probe tool;

forming an electrical connection between the integrated circuit structure and the substrate using a laser tool;

determining a location of the fault in the integrated circuit structure using a scanning electron microscope.

19. The method of claim 18, wherein probing the integrated circuit structure comprises coupling a probe to a plurality of pads in the integrated circuit structure.

20. The method of claim 18, wherein forming the electrical connection between the integrated circuit structure and the substrate using the laser tool comprises providing a location of the faulty integrated circuit structure to the laser tool.

21. The method of claim 20, wherein providing the location of the faulty integrated circuit structure to the laser tool comprises providing the location of a pad in the faulty integrated circuit structure to the laser tool.

22. The method of claim 21, wherein providing the location of a pad in the faulty integrated circuit structure to the laser tool comprises determining location coordinates of the probe tool and directing the laser tool to the location coordinates.

23. The method of claim 22, wherein forming the electrical connection between the integrated circuit structure and the substrate using the laser tool comprises forming the electrical connection between the integrated circuit structure and the substrate at the provided location coordinates.

24. The method of claim 23, wherein forming the electrical connection between the integrated circuit structure and the substrate at the provided location coordinates comprises melting a portion of the integrated circuit structure at the provided location coordinates using the laser tool.

25. The method of claim 24, wherein melting the portion of the integrated circuit structure at the provided location coordinates using the laser tool comprises irradiating the portion of the integrated circuit structure at the provided location coordinates using the laser tool.

26. The method of claim 18, wherein determining the location of the fault in the integrated circuit structure using the scanning electron microscope comprises providing a plurality of electrons to the integrated circuit structure using an electron beam from the scanning electron microscope.

27. The method of claim 18, wherein determining the location of the fault in the integrated circuit structure using the scanning electron microscope comprises detecting an electrical charge accumulation in a first portion of the integrated circuit structure.

28. The method of claim 18, wherein determining the location of the fault in the integrated circuit structure comprises applying a voltage contrasting technique to a first portion and a second portion of the integrated circuit structure.

29. The method of claim 18, wherein determining the location of the fault in the integrated circuit structure comprises providing location coordinates to a scanning electron microscope controller.

30. The method of claim 18, further comprising providing location coordinates of the probe tool to the laser tool and to the scanning electron microscope.