Offset control circuit, optical receiver using the same and optical communication system
First Claim
1. An offset control circuit comprising offset canceling means for canceling an offset component included in a pair of positive-phase and negative-phase signals and varying transitionally according to elapse of time by using a peak value of at least one of said positive-phase and negative-phase signals and a bottom value of at least one of said positive-phase and negative-phase signals and an adder circuit adding one of said positive-phase and negative-phase signals, to the peak value, and the bottom value of said positive-phase or negative phase signals at substantially the same ratio.
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Accused Products
Abstract
An offset control circuit can obtain an output waveform free of fluctuation of duty ratio by canceling offset transitionally varying according to elapsed time even upon reception of an optical signal in burst form significantly variable of level difference, an optical receiver employing the same and an optical communication system. The offset control circuit has offset canceling means for canceling an offset component included in a pair of positive-phase and negative-phase signal and varying transitionally according to elapse of time by using at least one of a peak value and a bottom value of the positive-phase and negative-phase signal.
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Citations
26 Claims
- 1. An offset control circuit comprising offset canceling means for canceling an offset component included in a pair of positive-phase and negative-phase signals and varying transitionally according to elapse of time by using a peak value of at least one of said positive-phase and negative-phase signals and a bottom value of at least one of said positive-phase and negative-phase signals and an adder circuit adding one of said positive-phase and negative-phase signals, to the peak value, and the bottom value of said positive-phase or negative phase signals at substantially the same ratio.
- 8. An offset control circuit comprising offset canceling means for canceling an offset component included in a pair of positive-phase and negative-phase signals and varying transitionally according to elapse of time wherein said offset canceling means comprises a single value holding circuit comprising one of a peak value and a bottom value of said positive-phase and negative-phase signals, and an arithmetic means for performing an arithmetic operation by connecting outputs of said value holding circuit with one of said positive-phase and negative-phase signals in a feedforward connection by adding one of said positive-phase and negative-phase signals to the output of the single value holding circuit at a ratio of substantially 1:
Specification