Thermal membrane sensor and method for the production thereof
First Claim
1. A process for manufacturing an exposed membrane over a silicon substrate, comprising the steps of:
- creating an etching mask on a main surface of the substrate that leaves an area of the silicon substrate where the membrane is to be created exposed;
electrochemically etching the exposed area of the silicon substrate to a preselected depth to form a layer of porous silicon within the exposed area;
removing the etching mask;
after performing the step of electrochemically etching, depositing on the layer of porous silicon within the exposed area a membrane layer composed of at least one of silicon carbide and silicon nitride;
creating openings inward from an upper surface of the membrane layer in preassigned areas of the membrane layer;
selectively creating circuit structures on the upper surface of the membrane layer, the selective creating step including the step of implanting the circuit structures into the upper surface of the membrane layer, wherein the selectively creating step includes creating conductor paths made of aluminum for the circuit structures into the upper surface of the membrane layer; and
removing the layer of porous silicon below the membrane layer by sacrificial layer etching.
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Abstract
A process for manufacturing a membrane sensor over a silicon substrate, preferably a thermal membrane sensor. A thin layer of silicon carbide or silicon nitride is deposited over an area of porous silicon formed in the surface of the substrate, and then openings that extend as far as the layer of porous silicon are formed in the silicon carbide or silicon nitride layer via a dry etching process. Next, semiconductor structures and conductor path structures are implanted into the upper surface of the membrane layer via lithographic steps, and then the sacrificial layer of porous silicon is removed using a suitable solvent such as ammonia. Thus an empty space that thermally isolates the sensor membrane from the substrate is created beneath the membrane layer.
52 Citations
15 Claims
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1. A process for manufacturing an exposed membrane over a silicon substrate, comprising the steps of:
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creating an etching mask on a main surface of the substrate that leaves an area of the silicon substrate where the membrane is to be created exposed;
electrochemically etching the exposed area of the silicon substrate to a preselected depth to form a layer of porous silicon within the exposed area;
removing the etching mask;
after performing the step of electrochemically etching, depositing on the layer of porous silicon within the exposed area a membrane layer composed of at least one of silicon carbide and silicon nitride;
creating openings inward from an upper surface of the membrane layer in preassigned areas of the membrane layer;
selectively creating circuit structures on the upper surface of the membrane layer, the selective creating step including the step of implanting the circuit structures into the upper surface of the membrane layer, wherein the selectively creating step includes creating conductor paths made of aluminum for the circuit structures into the upper surface of the membrane layer; and
removing the layer of porous silicon below the membrane layer by sacrificial layer etching. - View Dependent Claims (2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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4. A process for manufacturing an exposed membrane over a silicon substrate, comprising the steps of:
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creating an etching mask on a main surface of the substrate that leaves an area of the silicon substrate where the membrane is to be created exposed;
electrochemically etching the exposed area of the silicon substrate to a preselected depth to form a layer of porous silicon within the exposed area;
removing the etching mask;
depositing a membrane layer composed of at least one of silicon carbide and silicon nitride;
creating openings inward from an upper surface of the membrane layer in preassigned areas of the membrane layer;
selectively creating circuit structures on the upper surface of the membrane layer, the selective creating step including the step of implanting the circuit structures into the upper surface of the membrane layer, wherein the selectively creating step includes creating conductor paths made of aluminum for the circuit structures into the upper surface of the membrane layer; and
removing the layer of porous silicon below the membrane layer by sacrificial layer etching wherein the depositing step includes at least one of a low-temperature LPCVD process and a low-temperature PECVD process.
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Specification