Amplifier gain boost circuitry and method

• US 6,825,721 B2
• Filed: 07/12/2002
• Issued: 11/30/2004
• Est. Priority Date: 07/12/2002
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Ivanov, Vadim V., Sanchez, Stephen J., Meinel, Walter B.
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): Nguyen, Hiep
• Application Number:
  US10/193,871
• Publication Number:
  US 20040008086A1
• Time in Patent Office: 872 Days
• Field of Search: 327/52, 327/54, 330/253, 330/254, 330/255, 330/259, 330/260, 330/265
• US Class Current: 330/253
• CPC Class Codes: H03F 2203/45028 the differential amplifier amplifying transistors are folded cascode coupled transistors
• CPC Class Codes: H03F 2203/45301 there are multiple cascaded folded or not folded common gate stages of a cascode dif amp
• CPC Class Codes: H03F 2203/45302 the common gate stage of a cascode dif amp being controlled
• CPC Class Codes: H03F 2203/45682 the LC comprising one or more op-amps
• CPC Class Codes: H03F 3/45192 Folded cascode stages

Abstract

A gain boost circuit is provided in a differential amplifier including differentially connected first and second input transistors the drains of which are coupled to sources of first and second cascode transistors. A third cascode transistor has a source coupled to a drain of the first cascode transistor and a drain coupled to a bias current source. A gain boost amplifier has an output coupled to the gate of the third cascode transistor, a first input coupled to the drain of the first cascode transistor, and a second input coupled to the drain of the second cascode transistor.

Claims

1. A differential amplifier circuit comprising:

(a) first and second supply voltage rails, first and second input terminals, and an output terminal;

(b) differentially connected first and second input transistors of a first channel type to the first and second input terminals;

(c) a folded cascode circuit coupled to the first supply voltage rail and including a first cascode transistor and a second cascode transistor both of a second channel type, sources of the first and second cascode transistors being coupled to drains of the first and second input transistors, respectively;

(d) a first load transistor of the second channel type coupled between the source of the second cascode transistor and the first supply voltage rail and a second load transistor of the second channel type coupled between the source of the first cascode transistor and the first supply voltage rail;

(e) a bias source producing a bias signal on gates of the first and second cascode transistors;

(f) a third cascode transistor of the second channel type having a source coupled to a drain of the second cascode transistor and a drain coupled to a first current source, a drain of the first cascode transistor being coupled to a second current source, and a voltage level shift circuit coupled between the drain of the third cascode transistor and second load transistors; and

(g) a gain boost amplifier having a first input coupled to the drain of the first cascode transistor, a second input coupled to the drain of the second cascode transistor, and an output coupled to a gate of the third cascode transistor.

2. The differential amplifier circuit of claim 1 including an output stage having an input coupled to the drain of the first cascode transistor, the output stage including a pull-up transistor of the second channel type coupled between the second supply voltage rail and the output terminal, and a second output transistor of the first channel type coupled between the first supply voltage rail and the output terminal.

3. The differential amplifier of claim 2 including a class AB bias circuit coupled between a gate electrode of the pull-up and a gate electrode of the pull-down transistor.

4. The differential amplifier of claim 2 wherein the gain boost amplifier is a CMOS voltage-input differential amplifier.

5. The differential amplifier of claim 2 wherein the gain boost amplifier is a CMOS current-input differential amplifier.

6. A method of operating a differential amplifier circuit which includes first and second supply voltage rails, first and second input terminals, and an output terminal, differentially connected first and second input transistors of a first channel type to the first and second input terminals, and a folded cascode circuit coupled to the first supply voltage rail and including a first cascode transistor and a second cascode transistor both of a second channel type, sources of the first and second cascode transistors being coupled to drains of the first and second input transistors, respectively, the sources of the first and second cascode transistors also being coupled to a drain of a first load transistor and a drain of a second load transistor, respectively, the method comprising:

boosting the gain of the differential amplifier circuit without introducing additional components into a signal path of the differential amplifier circuit by providing local feedback representative of an output voltage of the differential amplifier circuit to gates of the first and second load transistors by

(a) coupling a drain of a third cascode transistor of the second channel type to a current source circuit and coupling a source of the third cascode transistor to a drain of the second cascode transistor;

(b) coupling a drain of the third cascode transistor to gates of the first and second load transistors; and

(c) driving a gate of the third cascode transistor by means of a gain boost amplifier having a first input coupled to the drain of the first cascode transistor and a second input coupled to the drain of the second cascode transistor, to accomplish the function of increasing the output impedance of the differential amplifier circuit.

7. The method of claim 6 wherein step (b) includes driving a gate of the third cascode transistor by means of a level shift circuit coupled to the drain of the third cascode transistor.