Capability addressing with tight object bounds

• US 6,826,672 B1
• Filed: 05/15/2001
• Issued: 11/30/2004
• Est. Priority Date: 05/16/2000
• Status: Expired due to Fees

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Brown, Jeremy H., Grossman, Jeffrey P., Huang, Andrew W., Knight, Thomas F. Jr.
• Primary Examiner(s): MCLEAN MAYO, KIMBERLY N
• Application Number:
  US09/855,875
• Time in Patent Office: 1,295 Days
• Field of Search: 711/220, 711/200, 711/202, 711/163, 711/203, 711/152
• US Class Current: 711/220
• CPC Class Codes: G06F 12/1045 associated with a data cache
• CPC Class Codes: G06F 12/145 the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
• CPC Class Codes: G06F 12/1475 in a virtual system, e.g. with translation means

Abstract

A pointer representation includes a permission field to define capabilities of the system in processing the data to which an address in the pointer of representation points. Bounds of the memory segment to which the capabilities apply are defined by a block field, which defines a block size, and a length field, which defines a number of blocks of that size within the segment of memory. To permit computation of the full range of addresses to which the capability applies, a finger field is included to denote the block of the segment of memory to which the address points. An increment-only bit may cause the system to preclude any negative offsets from the address in the pointer representation. Subsegments within a segment may be further defined by additional block, length and finger fields.

Claims

1. A data processing system comprising:

memory; and

a pointer to a location in memory, the pointer comprising;

a block field defining a block size;

a length field defining a number of blocks in a segment of memory;

an address pointing into the segment of memory;

a finger field which denotes a block of the segment of memory into which the address points; and

an increment-only bit which when set causes the system to exclude negative offsets to the address in the pointer.

2. A system as claimed in claim 1 wherein the address of the pointer to a location in memory points to the base address of a memory region within the segment, all portions of the memory segment not within the memory region having addresses less tan the address in the pointer to a location in memory.

3. A data processing system comprising:

memory; and

a pointer to a location in memory for each of a segment of memory and a

subsegment within the segment of memory, the pointer comprising;

a block field defining a block size;

a length field defining a number of blocks in a segment of memory;

an address pointing into the segment of memory; and

a finger field which denotes a block of the segment of memory into which the address points.

4. A method of representing data in a data processing system comprising:

defining a block size in a pointer to a location in memory;

defining in the pointer to a location in memory a number of blocks in a segment of memory;

defining in the pointer to a location in memory an address pointing into the segment of memory;

defining in the pointer to a location in memory a block of the segment of memory into which the address points; and

excluding negative offsets to the address in the memory representation where an increment-only bit is included in the pointer.

5. A method as claimed in claim 4 wherein the address of the pointer to a location in memory points to the base address of a memory region within the segment, all portions of the memory segment not within the memory region having addresses less than the address in the pointer to a location in memory.

6. A method of representing data in a data processing system comprising:

defining a pointer to a location in memory for each of a segment of memory and a subsegment within the segment of memory;

defining a block size in a pointer to a location in memory,

defining in the pointer to a location in memory a number of blocks in a segment of memory;

defining in the pointer to a location in memory an address pointing into the segment of memory; and

defining in the pointer to a location in memory a block of the segment of memory into which the address points.

7. A computer program product comprising:

a computer usable medium for storing data; and

a set computer program instructions embodied on the computer usable medium, including a pointer to a location in memory, the pointer comprising;

a block field defining a block size;

a length field defining a number of blocks in a segment of memory;

an address pointing into the segment of memory; and

a finger field which denotes a block of the segment of memory into which the address points; and

an increment-only bit which when set causes the system to exclude negative offsets to the address in the pointer to a location in memory.

8. A computer program product as claimed in claim 7 wherein the address of the pointer to a location in memory points to the base address of a memory region within the segment, all portions of the memory segment not within the memory region having addresses less than the address in the pointer to a location in memory.

9. A computer program product comprising:

a computer usable medium for storing data; and

a set of computer program instructions embodied on the computer usable medium, including a pointer to a location in memory for each of a segment of memory and a subsegment within the segment of memory, the pointer comprising;

a block field defining a block size;

a length field defining a number of blocks in a segment of memory;

an address pointing into the segment of memory; and

a finger field which denotes a block of the segment of memory into which the address points.

10. A computer data signal comprising a pointer to a location in memory, the pointer comprising:

a block field defining a block size;

a length field defining a number of blocks in the segment of memory;

an address pointing into the segment of memory;

a finger field which denotes a block of the segment of memory into which the address points; and

an increment-only bit which when set causes system to exclude negative offsets to the address in the pointer to a location in memory.

11. A computer data signal as claimed in claim 10 wherein the address of the pointer to a location in memory points to the base address of a memory region within the segment, all portions of the memory segment not within the memory region having addresses less than the address in the pointer to a location in memory.

12. A computer data signal comprising a pointer to a location in memory for each of a segment of memory and a subsegment within the segment of memory, the pointer comprising:

a block field defining a block size;

a length field defining a number of blocks in a segment of memory;

an address pointing into the segment of memory; and

a finger field which denotes a block of the segment of memory into which the address points.