Method and system for testing a universal serial bus within a computing device

• US 6,829,726 B1
• Filed: 03/06/2001
• Issued: 12/07/2004
• Est. Priority Date: 03/06/2000
• Status: Active Grant

• Current Assignee: PC-Doctor, Inc.
• Original Assignee: PC-Doctor, Inc.
• Inventors: Korhonen, Aki
• Primary Examiner(s): Iqbal, Nadeem
• Application Number:
  US09/800,763
• Time in Patent Office: 1,372 Days
• Field of Search: 714/25, 714/27, 714/31, 714/37, 714/43, 714/45, 714/56, 710/5, 710/8, 710/15, 710/18
• US Class Current: 714/25
• CPC Class Codes: G06F 11/221 to test buses, lines or interfaces, e.g. stuck-at or open line faults
• CPC Class Codes: G06F 11/273 Tester hardware, i.e. output processing circuits G06F11/263 takes precedence

Abstract

The present invention generally relates to the field of testing computing devices. More specifically, the present invention relates to a system and method for testing a universal serial bus (“USB”) within a computing device. In an exemplary embodiment, the system includes a test device and a test control module. The test device is connected to a USB port on the computing device. The test control module resides on the computing device and interacts with the test device to test the USB port. Once connected, the test device is used to monitor signals on the USB port exchanged between the test device and the USB port. Examples of signals that are monitored are the voltage levels, frame timing, and USB bus signals and power voltages. The test device then communicates the monitored information to the test control module for analysis. The test control module is further capable of causing a second set of tests to be performed including a full-speed device detect test, a bulk transfer test, an isochronous transfer test, an interrupt transfer test, and a low-speed device detect test. The results of these tests are then communicated to the user.

Claims

1. A system for testing a host computing device having a universal serial bus host controller and a serial bus port, comprising:

a test control module residing on said host computing device; and

a test device coupled to said universal serial bus host controller via said universal serial bus port;

wherein said test control module communicates with said test device in order to perform a series of tests on said universal serial bus host controller and said universal serial bus port.

2. The system according to claim 1, wherein said series of tests includes a voltage level test.

3. The system according to claim 1, wherein said series of tests include a full-speed device detect test.

4. The system according to claim 1, wherein said series of tests includes a frame timing check.

5. The system according to claim 1, wherein said series of tests includes a bus signal and power voltage test.

6. The system according to claim 1, wherein said series of tests includes a bulk transfer test.

7. The system according to claim 1, wherein said series of tests includes an isochronous transfer test.

8. The system according to claim 1, wherein said series of tests includes an interrupt transfer test.

9. The system according to claim 3, wherein said series of tests includes a low-speed device detect test.

10. A system for testing a host computing device having a universal serial bus port, comprising:

a test device coupled to said universal serial bus port, said test device further includes a device controller and a test response module;

a test control module configured to communicate with said test response module in order to conduct a series of tests to test said universal serial bus port;

wherein said series of tests includes a voltage level test, a frame timing check, and a bus signal and power voltage test.

11. The system according to claim 10, wherein said series of tests further includes a full-speed device detect test, a bulk transfer test, an isochronous transfer test, an interrupt transfer test, and a low-speed device detect test.

12. The system according to claim 10, wherein said test response module in response to instructions received from said test control module causes said device controller to provide information in accordance with a specific test;

and

wherein said information is forwarded to said test control module to allow said test control module to determine whether said universal serial bus port is functioning properly.

13. A method for testing a host computing device having a universal serial bus port and a universal serial bus cable using a test device and a test control module, comprising:

connecting said test device to said universal serial bus port;

initializing said test device;

causing said test device to provide information for a series of tests in response to instructions received from said test control module;

communicating said information to said test control module; and

causing said test control module to analyze said information to determine whether said universal serial bus port is functioning properly.

14. The method of claim 13, wherein said series of tests includes a voltage level test, a frame timing check, and a bus signal and power voltage test.

15. The method of claim 14, wherein said series of tests further includes a full-speed device detect test, a bulk transfer test, an isochronous transfer test, an interrupt transfer test, and a low-speed device detect test.

16. The method of claim 13, wherein initializing said test device comprises configuring said test device according to a USB protocol.

17. The method of claim 13, wherein communicating said information to said test control module comprises:

sending a request for said information in a control packet to said test device; and

sending said information in a response packet from said test device to said test control module.

18. The method of claim 13, further comprising:

upon confirming that said universal serial bus port is functioning properly, connecting said universal serial bus cable between said test device and said universal serial bus port;

causing said test device to provide information for said series of tests in response to instructions received from said test control module;

communicating said information to said test control module; and

causing said test control module to analyze said information to determine whether said universal serial bus cable is functioning properly.